Pre-processing Block Hardware Architecture in Image Processing Using Reconfigurable Platform

2021 ◽  
pp. 138-145
Author(s):  
G. N. Chiranjeevi ◽  
Subhash Kulkarni
Keyword(s):  
Image Processing ◽  
Hardware Architecture ◽  
Reconfigurable Platform ◽  
Processing Block

scholarly journals Image processing using a reconfigurable platform: Pre-processing block hardware architecture

2021 ◽  
Vol 10 (3) ◽  
pp. 230
Author(s):  
Chiranjeevi G. N. ◽  
Subhash Kulkarni
Keyword(s):  
Image Processing ◽  
Image Data ◽  
Data Access ◽  
Hardware Architecture ◽  
Access Time ◽  
Zero Padding ◽  
Real Time Image ◽  
Reconfigurable Platform ◽  
Processing Block ◽  
Time Image

<p class="CM12">Real time image processing is a challenging task in which fetching the sub image requires offset memory access apart from core processing needs. This paper aims at overcoming the offset needs for memory addressing in pre-processing blocks. Another feature of this present work is to appending the image data with customized algorithmic reequipments viz duplicating, zero padding. For KxK kernel size, the proposed hardware architecture can be programmed to fetch K pixels in one cycle, reducing the data access time. Results have been compared with software-based processing for KxK spatial filtering. performance indicates significant timing improvement using proposed pre-processing hardware block.</p>

scholarly journals Overhead wires detection by FPGA real-time image processing

2019 ◽  
Vol 28 ◽  
pp. 01046
Author(s):  
Paweł Kowalski ◽  
Robert Smyk
Keyword(s):  
Image Processing ◽  
Real Time ◽  
Hardware Implementation ◽  
Image Filtering ◽  
Maximum Frequency ◽  
Hardware Complexity ◽  
Real Time Image Processing ◽  
Real Time Image ◽  
Processing Block ◽  
Time Image

The paper presents design and hardware implementation of real-time image filtering for overhead wires detection divided on image processing and results presentation blocks. The image processing block was separated from the whole implementation, and its delay and hardware complexity was analysed. Also the maximum frequency of image processing of the proposed implementation was estimated.

A new software/hardware architecture for real time image processing of wide area airborne camera images

2008 ◽  
Vol 4 (3) ◽  
pp. 229-244 ◽  
Author(s):  
Ulrike Thomas ◽  
Dominik Rosenbaum ◽  
Franz Kurz ◽  
Sahil Suri ◽  
Peter Reinartz
Keyword(s):  
Image Processing ◽  
Real Time ◽  
Hardware Architecture ◽  
Wide Area ◽  
Real Time Image Processing ◽  
Real Time Image ◽  
Time Image
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