Energy-Performance Tradeoffs for HPC Applications on Low Power Processors

2015 ◽  
pp. 737-748 ◽  
Author(s):  
Enrico Calore ◽  
Sebastiano Fabio Schifano ◽  
Raffaele Tripiccione
Keyword(s):  
Low Power ◽  
Energy Performance

scholarly journals Energy Performance Analysis and Modelling of LoRa Prototyping Boards

Sensors ◽  
2021 ◽  
Vol 21 (23) ◽  
pp. 7992
Author(s):  
Solomon Ould ◽  
Nick S. Bennett
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Data Transmission ◽  
Electrical Power ◽  
Energy Performance ◽  
Battery Life ◽  
Hypothetical Scenario ◽  
Study Power ◽  
Power Testing ◽  
Electrical Power Consumption

LoRaWAN has gained significant attention for Internet-of-Things (IOT) applications due to its low power consumption and long range potential for data transmission. While there is a significant body of work assessing LoRA coverage and data transmission characteristics, there is a lack of data available about commercially available LoRa prototyping boards and their power consumption, in relation to their features. It is currently difficult to estimate the power consumption of a LoRa module operating under different transmission profiles, due to a lack of manufacturer data available. In this study, power testing has been carried out on physical hardware and significant variation was found in the power consumption of competing boards, all marketed as “extremely low power”. In this paper, testing results are presented alongside an experimentally-derived power model for the lowest power LoRa module, and power requirements are compared to firmware settings. The power analysis adds to existing work showing trends in data-rate and transmission power settings effects on electrical power consumption. The model’s accuracy is experimentally verified and shows acceptable agreement to estimated values. Finally, applications for the model are presented by way of a hypothetical scenario and calculations performed in order to estimate battery life and energy consumption for varying data transmission intervals.

Ultra-Low Power and High Sensitivity of Joint Clock Gating Based Dual Feedback Edge Triggered Flip Flop for Biomedical Imaging Applications

2021 ◽  
Vol 11 (12) ◽  
pp. 3215-3222
Author(s):  
S. Prema ◽  
N. Karthikeyan ◽  
S. Karthik
Keyword(s):  
Low Power ◽  
Input Signal ◽  
Biomedical Imaging ◽  
Optimization Technique ◽  
Energy Performance ◽  
Feedback Loops ◽  
Clock Signal ◽  
Clock Gating ◽  
Flip Flop ◽  
Ultra Low Power

To adapt to varied working situations, the latest biomedical imaging applications require low energy consumption, high performance, and extensive energy-performance scalability. State-of-the-art electronics with higher sensitivity, higher counting rate, and finer time resolution are required to create higher precision, higher temporal resolution, and maximum contrast biomedical images. In recent days, the system’s power consumption is important critically in modern VLSI circuits particularly for the low power application. In order to decrease the power, a power optimization technique must be used at various design levels. The low power use of logic cells is a proficient technique for decreasing the circuit level power. Dual Feedback edge triggered Flip Flop (DFETFF) is considered for biomedical imaging applications in the proposed system. Initially, the high dynamic range voltage is given as input signal. The comparator output is then retried at the comparator end. The integration capacitor is employed for storing remaining voltage signal. The comparator voltage is then given to the capacitor reset block. In the proposed work, a capacitor-reset block that employs clock signal takes up a dual-feedbackedge-triggered Flip-flop as an alternative of a conventional type for reducing the final output signals errors. Dual feedback loops assure that feedback loops do not tri-state at the time of SET restoration, a scheme that could lead to SEUs in latches if a single delay component and a single feedback loop are used. In digital system, Clock gating is a competent method of lessening the overall consumption of power along with deactivating the clock signal selectively and is useful for controlling the usage of clock signal asynchronously in reference to input-signal current. The integration-control (Vint) signal is employed in controlling the integration time. On the termination of integration, the signal level phase is kept, also similar one is send to arrangement all through read period. As a result, the simulation was carried out after the design layout and the estimations of performance were made and are compared with traditional approaches to prove the proposed mechanism effectiveness for future biomedical applications.

Ultra Low Power Bioelectronics

2009 ◽  
Author(s):  
Rahul Sarpeshkar
Keyword(s):  
Low Power ◽  
Ultra Low Power

Less Power, Greater Conflict

2018 ◽  
Vol 49 (1) ◽  
pp. 47-62 ◽  
Author(s):  
Petra C. Schmid
Keyword(s):  
Low Power ◽  
High Power ◽  
Goal Pursuit ◽  
Goal Conflict ◽  
Personal Goals ◽  
Multiple Goals ◽  
Objective Performance ◽  
The Future ◽  
The Way

Abstract. Power facilitates goal pursuit, but how does power affect the way people respond to conflict between their multiple goals? Our results showed that higher trait power was associated with reduced experience of conflict in scenarios describing multiple goals (Study 1) and between personal goals (Study 2). Moreover, manipulated low power increased individuals’ experience of goal conflict relative to high power and a control condition (Studies 3 and 4), with the consequence that they planned to invest less into the pursuit of their goals in the future. With its focus on multiple goals and individuals’ experiences during goal pursuit rather than objective performance, the present research uses new angles to examine power effects on goal pursuit.

An interdependence account of sexism and power: Men’s hostile sexism, biased perceptions of low power, and relationship aggression.

2019 ◽  
Vol 117 (2) ◽  
pp. 338-363 ◽  
Author(s):  
Emily J. Cross ◽  
Nickola C. Overall ◽  
Rachel S. T. Low ◽  
James K. McNulty
Keyword(s):  
Low Power ◽  
Hostile Sexism ◽  
Relationship Aggression

Power mad [low-power design]

2004 ◽  
Vol 18 (3) ◽  
pp. 37
Author(s):  
J. Frenkil
Keyword(s):  
Low Power ◽  
Low Power Design
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