2014 ◽  
Vol 608-609 ◽  
pp. 454-458
Author(s):  
Wei Bai ◽  
Chen Yuan Hu

This paper presents novel logic/software co-work architecture for embedded high definition image processing platform, which is built by the considerations of system level, board hardware level, and the tasks partition between CPU processing and programmable logic based on the latest launched System on Chip Field Programmable Gate Array (Soc FPGA) – Xilinx ZC7020. For this case, we comprehensive analyze of the critical data paths: the uniform Advanced Extensible Interface (AXI) processing between processing system (PS) and processing logic (PL), including high definition video pass through PL to PS and PS software processing send to PL for speed up. We have included the transplant of opensource Linux, multiprocessing cooperative control and boot loader in PS side. Since the general platform is proposed, a fire detection approach based on high definition image processing is implemented. Experiment results indicated the feasibility and universality of the embedded system architecture.


Author(s):  
G.Y. Fan ◽  
J.M. Cowley

In recent developments, the ASU HB5 has been modified so that the timing, positioning, and scanning of the finely focused electron probe can be entirely controlled by a host computer. This made the asynchronized handshake possible between the HB5 STEM and the image processing system which consists of host computer (PDP 11/34), DeAnza image processor (IP 5000) which is interfaced with a low-light level TV camera, array processor (AP 400) and various peripheral devices. This greatly facilitates the pattern recognition technique initiated by Monosmith and Cowley. Software called NANHB5 is under development which, instead of employing a set of photo-diodes to detect strong spots on a TV screen, uses various software techniques including on-line fast Fourier transform (FFT) to recognize patterns of greater complexity, taking advantage of the sophistication of our image processing system and the flexibility of computer software.


2014 ◽  
Vol 687-691 ◽  
pp. 3733-3737
Author(s):  
Dan Wu ◽  
Ming Quan Zhou ◽  
Rong Fang Bie

Massive image processing technology requires high requirements of processor and memory, and it needs to adopt high performance of processor and the large capacity memory. While the single or single core processing and traditional memory can’t satisfy the need of image processing. This paper introduces the cloud computing function into the massive image processing system. Through the cloud computing function it expands the virtual space of the system, saves computer resources and improves the efficiency of image processing. The system processor uses multi-core DSP parallel processor, and develops visualization parameter setting window and output results using VC software settings. Through simulation calculation we get the image processing speed curve and the system image adaptive curve. It provides the technical reference for the design of large-scale image processing system.


Sign in / Sign up

Export Citation Format

Share Document