Analysis of Genetic Algorithm for Effective Power Delivery and with Best Upsurge

Author(s):  
Azeem Mohammed Abdul ◽  
Srikanth Cherukuvada ◽  
Annaram Soujanya ◽  
R. Srikanth ◽  
Syed Umar
Electronics ◽  
2020 ◽  
Vol 9 (8) ◽  
pp. 1243 ◽  
Author(s):  
Riccardo Cecchetti ◽  
Francesco de Paulis ◽  
Carlo Olivieri ◽  
Antonio Orlandi ◽  
Markus Buecker

An iterative optimization for decoupling capacitor placement on a power delivery network (PDN) is presented based on Genetic Algorithm (GA) and Artificial Neural Network (ANN). The ANN is first trained by an appropriate set of results obtained by a commercial simulator. Once the ANN is ready, it is used within an iterative GA process to place a minimum number of decoupling capacitors for minimizing the differences between the input impedance at one or more location, and the required target impedance. The combined GA–ANN process is shown to effectively provide results consistent with those obtained by a longer optimization based on commercial simulators. With the new approach the accuracy of the results remains at the same level, but the computational time is reduced by at least 30 times. Two test cases have been considered for validating the proposed approach, with the second one also being compared by experimental measurements.


2016 ◽  
Vol 5 (4) ◽  
pp. 128-132 ◽  
Author(s):  
Mohammad Ali Khorrami ◽  
Paul Dixon ◽  
Yoeri Arien ◽  
John Song

Electronics ◽  
2019 ◽  
Vol 8 (11) ◽  
pp. 1219 ◽  
Author(s):  
de Paulis ◽  
Cecchetti ◽  
Olivieri ◽  
Piersanti ◽  
Orlandi ◽  
...  

To reduce the noise created by a power delivery network, the number, the value of decoupling capacitors and their arrangement on the board are critical to reaching this goal. This work deals with specific improvements, implemented on a genetic algorithm, which used for the optimization of the decoupling capacitors in order to obtain the frequency spectrum of the input impedance in different positions on the network, below previously defined values. Measurements are performed on a specifically manufactured board in order to validate the effectiveness of the proposed algorithm and the optimization results obtained for a specific example board.


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