Calculation of three-dimensional thermal-gradient-induced stress birefringence in slab lasers

Since the thickness of the stacked silicon chips in 3D integration has been thinned to less than 100 μm, the local thermal deformation of the chips has increased drastically because of the decrease of the flexural rigidity of the thinned chips. The clear periodic thermal deformation and thus, the thermal residual stress distribution appears in the stacked chips due to the periodic alignment of metallic bumps, and they deteriorate the reliability of products. In this paper, the dominant structural factors of the local residual stress in a silicon chip are discussed quantitatively based on the results of a three-dimensional finite element analysis and the measurement of the local residual stress in a chip using stress sensor chips. The piezoresistive strain gauges were embedded in the sensor chips. The length of each gauge was 2 μm, and an unit cell consisted of 4 gauges with different crystallographic directions. This alignment of strain gauges enables to measure the tensor component of three-dimensional stress fields separately. Test flip chip substrates were made by silicon chip on which the area-arrayed tin/copper bumps were electroplated. The width of a bump was fixed at 200 μm, and the bump pitch was varied from 400 μm to 1000 μm. The thickness of the copper layer was about 40 μm and that of tin layer was about 10 μm. This tin layer was used for the rigid joint formation by alloying with copper interconnection formed on a stress sensing chip. The measured amplitude of the residual stress increased from about 30 MPa to 250 MPa depending on the combination of materials such as bump, underfill, and interconnections. It was confirmed that both the material constant of underfill and the alignment structure of fine bumps are the dominant factors of the local deformation and stress of a silicon chip mounted on area-arrayed metallic bumps. It was also confirmed experimentally that both the hound’s-tooth alignment between a TSV (Through Silicon Via) and a bump and control of mechanical properties of electroplated copper thin films used for the TSV and bump is indispensable in order to minimize the packaging-induced stress in the three-dimensionally mounted chips. This test chip is very effective for evaluating the packaging-process induced stress in 3D stacked chips quantitatively.

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Gas migration model based on overburden strata fracture evolution law in three dimensional mine-induced stress conditions

IOP Conference Series Earth and Environmental Science ◽

10.1088/1755-1315/61/1/012005 ◽

2017 ◽

Vol 61 ◽

pp. 012005

Author(s):

Xing Li ◽

Guangzhi Yin

Keyword(s):

Three Dimensional ◽

Stress Conditions ◽

Gas Migration ◽

Evolution Law ◽

Migration Model ◽

Model Based ◽

Fracture Evolution ◽

Induced Stress ◽

Overburden Strata

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Backcalculation of Thermally Deformed Concrete Pavements

Transportation Research Record Journal of the Transportation Research Board ◽

10.3141/1716-08 ◽

2000 ◽

Vol 1716 (1) ◽

pp. 64-72 ◽

Cited By ~ 10

Author(s):

Samir N. Shoukry

Keyword(s):

Thermal Gradient ◽

Concrete Slab ◽

Three Dimensional ◽

Plain Concrete ◽

Slab Thickness ◽

Fe Model ◽

Concrete Pavements ◽

Dimensional Finite Element ◽

Three Dimensional Finite Element ◽

Falling Weight

Nonlinear explicit three-dimensional finite element (3-D FE) modeling is used to investigate the performance of the falling weight deflectometer (FWD) test in the evaluation of layer moduli of jointed plain concrete pavements (JPCP) subjected to nonlinear thermal gradient through the slab thickness. Concrete slab separation from the base, in-plane friction at the concrete-base interface, the gravitational forces, and the interface characteristics between dowel bars and surrounding concrete are all represented in the 3-D FE model. Experimental verification of the model is obtained through comparison of the 3-D FE generated response to ( a) the FWD measured deflection basin and ( b) the measured response of an instrumented rigid pavement section located in Ohio to a loaded truck moving at 21.8 m/s (48 mph). Several cases of linear and nonlinear thermal gradients are applied to the model, and deflection basins are obtained. Two backcalculation programs, MODULUS 5.0 and EVERCALC 4.0, are used for prediction of the layer moduli in each case, and the values are compared. The results indicate that thermal curling of the slab due to negative thermal gradient has little effect on the accuracy of backcalculated moduli. Warping of the slab due to positive thermal gradient greatly influences the measured FWD deflection basin and leads to significant errors in the backcalculated moduli. These errors may be minimized if the time an FWD test is conducted falls between the late afternoon and midmorning (from 5:30 p.m. to 9:30 a.m. during summer in West Virginia).

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Seismic hazard induced by mechanically interactive fault segments

Bulletin of the Seismological Society of America ◽

10.1785/bssa0830020436 ◽

1993 ◽

Vol 83 (2) ◽

pp. 436-449

Author(s):

C. Allin Cornell ◽

Shen-Chyun Wu ◽

Steven R. Winterstein ◽

James H. Dieterich ◽

Robert W. Simpson

Keyword(s):

Final Section ◽

Three Dimensional ◽

Earthquake Risk ◽

Physical Interaction ◽

Earthquake Recurrence ◽

Induced Stress ◽

Stress Changes ◽

Temporal And Spatial ◽

Gross Behavior ◽

Analytical Expressions

Abstract This paper presents a phenomenological stochastic model for earthquake recurrence processes involving physical interaction among fault segments. Slip on one segment may reduce (or increase) the time to the next event on another segment or possibly induce an immediate slip on that segment as well. The gross behavior of this model is first observed through simulations; temporal and spatial disorder are observed even when the stochastic aspects are minimized. To estimate the strength of these interactions, we derive factors from the output of three-dimensional elastic dislocation analyses, relating induced stress changes to temporal changes in next-event dates. In a final section, we derive approximate analytical expressions and numerical results for future probabilistic earthquake risk and site hazard, conditional on the elapsed times since events on all relevant fault segments and on the number of events since that may have caused stress changes (interactions).

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EFFECT OF TRANSIENT THERMAL GRADIENT ON STRESSES IN COMPOSITE BRIDGES

Proceedings of International Structural Engineering and Construction ◽

10.14455/isec.res.2019.65 ◽

2019 ◽

Vol 6 (1) ◽

Author(s):

Caesar Abi Shdid ◽

Omar El-Masri

Keyword(s):

Thermal Gradient ◽

Thermal Stresses ◽

Three Dimensional ◽

Concrete Bridges ◽

Element Formulation ◽

Expansion Joints ◽

Thermally Induced ◽

Heat Transfer Theory ◽

Three Dimensional Finite Element ◽

Concrete Deck

Composite steel-concrete bridges experience higher thermally induced stresses than their concrete and steel cousins. These thermal stresses which can result from support restraints, debris accumulating in expansion joints, or from non-uniform thermal gradients, can lead to significant damage in the concrete deck. Conventional heat transfer theory in solids, in three-dimensional finite element formulation, is used to perform a sequentially coupled thermal-stress analysis in a selected single-span case study bridge. Actual environmental boundary conditions for a selected geographical region are used to develop the thermal profile. The vertical thermal gradient is shown to be largely non-linear as opposed to existing models, such as AASHTO. The thermally induced tensile stresses in the concrete are shown to be significant compared to service load stresses and constitute 60% of the tensile strength of the concrete deck.

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Simulating cryogenic fracturing process with TOUGH-FEMM

10.5194/egusphere-egu2020-21313 ◽

2020 ◽

Author(s):

Haiyang Zhao ◽

Zhiyuan Liu

Keyword(s):

Thermal Gradient ◽

Three Dimensional ◽

Meshfree Method ◽

Clean Energy ◽

Fracture Network ◽

Carbon Production ◽

Fracturing Process ◽

Hydro Carbon ◽

Cryogenic Fracturing ◽

Hydraulic Simulator

<p>The dry hot rock (DHR) is a widely distributed renewable and clean energy. Cryogenic fracturing, such as liquid nitrogen fracturing technology, in DHR not only avoids the consuming of water, but also enhances the fracturing with the rock damage induced by thermal stress. During fracturing, cryogenic fluid (extremely low temperature) is utilized to trigger sharp a thermal gradient and fracturing surrounding boreholes, which generates fracture networks and increase the permeability of DHR. In this work, the TOUGH-FEMM simulator, which links the TOUGH2 thermal-hydraulic simulator and a mechanical simulator based on hybrid the finite-element meshfree method (FEMM), is developed to model three-dimensional cracking induced by cryogenic injection. The results of the numerical simulations agree with the experimental results showing that the fracture network is generated and connected to the borehole. An increased connectivity between a production borehole and the fracture network can significantly enhance fluid and hydro carbon production.</p>

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Membrane folding by ion implantation induced stress to fabricate three-dimensional nanostructures

Microelectronic Engineering ◽

10.1016/j.mee.2007.01.182 ◽

2007 ◽

Vol 84 (5-8) ◽

pp. 1454-1458 ◽

Cited By ~ 25

Author(s):

William J. Arora ◽

Henry I. Smith ◽

George Barbastathis

Keyword(s):

Ion Implantation ◽

Three Dimensional ◽

Induced Stress

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Minimization of the Local Residual Stress in 3D Flip Chip Structures by Optimizing the Mechanical Properties of Electroplated Materials and the Alignment Structure of TSVs and Fine Bumps

Journal of Electronic Packaging ◽

10.1115/1.4006142 ◽

2012 ◽

Vol 134 (2) ◽

Cited By ~ 3

Author(s):

Kota Nakahira ◽

Hironori Tago ◽

Fumiaki Endo ◽

Ken Suzuki ◽

Hideo Miura

Keyword(s):

Mechanical Properties ◽

Residual Stress ◽

Thermal Deformation ◽

Flip Chip ◽

Flexural Rigidity ◽

Three Dimensional ◽

Strain Gauges ◽

Copper Interconnection ◽

Induced Stress ◽

Alignment Structure

Since the thickness of stacked silicon chips in 3D integration has been thinned to less than 100 μm, the local thermal deformation of the chips has increased drastically because of the decrease of the flexural rigidity of the thinned chips. The clear periodic thermal deformation and thus, the local distribution of thermal residual stress appears in the stacked chips due to the periodic alignment of metallic bumps, and they sometimes deteriorate mechanical and electrical reliability of electronic products. In this paper, the dominant structural factors of the local residual stress in a silicon chip are investigated quantitatively based on the results of a three-dimensional finite element analysis and the measurement of the local residual stress in a chip using stress sensor chips. The piezoresistive strain gauges were embedded in the sensor chips. The length of each gauge was 2 μm, and an unit cell consisted of four gauges with different crystallographic directions. This alignment of the strain gauges enables us to measure the tensor component of three-dimensional stress fields separately. Test flip chip substrates were made of silicon chip on which the area-arrayed tin/copper bumps were electroplated. The width of a bump was fixed at 200 μm, and the bump pitch was varied from 400 μm to 1000 μm. The thickness of the copper bump was about 40 μm and that of tin layer was about 10 μm. This tin layer was used for the formation of rigid joint by alloying it with copper interconnection formed on a stress sensing chip. The measured amplitude of the residual stress increased from about 30 MPa to 250 MPa depending on the combination of materials such as bump, underfill, and interconnections. It was confirmed that both the material constant of underfill and the alignment structure of fine bumps are the dominant factors of the local deformation and stress of a silicon chip mounted on area-arrayed metallic bumps. It was also confirmed that not only the control of mechanical properties of electroplated copper thin films, but also the hound’s-tooth alignment of a through silicon via and a bump are indispensable for minimizing the packaging-induced stress in the three-dimensionally mounted chips. This test chip is very effective for evaluating the packaging-process-induced stress in 3D stacked chips quantitatively.

Download Full-text