Interfacial strengths of organosilicate glasses deposited on silicon wafers

2008 ◽  
Vol 108 (1) ◽  
pp. 115-119
Author(s):  
T.C. Liu ◽  
Sanboh Lee ◽  
B.T. Chen ◽  
S.M. Jang
Keyword(s):  
Silicon Wafers ◽  
Organosilicate Glasses

Arsenic segregation in polysilicon

1983 ◽  
Vol 41 ◽  
pp. 154-155 ◽  
Author(s):  
P.E. Batson ◽  
C.R.M. Grovenor ◽  
D.A. Smith ◽  
C. Wong
Keyword(s):  
Incident Beam ◽  
Silicon Wafers ◽  
Chemical Polishing ◽  
Bright Field Image ◽  
Beam Size ◽  
Stem Analysis ◽  
Bright Field ◽  
Twin Boundaries ◽  
X Ray ◽  
Line Scan

In this work As doped polysilicon was deposited onto (100) silicon wafers by APCVD at 660°C from a silane-arsine mixture, followed by a ten minute anneal at 1000°C, and in one case a further ten minute anneal at 700°C. Specimens for TEM and STEM analysis were prepared by chemical polishing. The microstructure, which is unchanged by the final 700°C anneal,is shown in Figure 1. It consists of numerous randomly oriented grains many of which contain twins.X-ray analysis was carried out in a VG HB5 STEM. As K α x-ray counts were collected from STEM scans across grain and twin boundaries, Figures 2-4. The incident beam size was about 1.5nm in diameter, and each of the 20 channels in the plots was sampled from a 1.6nm length of the approximately 30nm line scan across the boundary. The bright field image profile along the scanned line was monitored during the analysis to allow correlation between the image and the x-ray signal.

Preparation of integrated circuits for TEM electromigration in situ studies

1986 ◽  
Vol 44 ◽  
pp. 882-883
Author(s):  
J. V. Maskowitz ◽  
W. E. Rhoden ◽  
D. R. Kitchen ◽  
R. E. Omlor ◽  
P. F. Lloyd
Keyword(s):  
Integrated Circuits ◽  
Crystallographic Orientation ◽  
Silicon Wafers ◽  
Minimum Size ◽  
Test Vehicle ◽  
In Situ Studies ◽  
Boron Doped ◽  
Doped Silicon ◽  
Drill Holes

The fabrication of the aluminum bridge test vehicle for use in the crystallographic studies of electromigration involves several photolithographic processes, some common, while others quite unique. It is most important to start with a clean wafer of known orientation. The wafers used are 7 mil thick boron doped silicon. The diameter of the wafer is 1.5 inches with a resistivity of 10-20 ohm-cm. The crystallographic orientation is (111).Initial attempts were made to both drill and laser holes in the silicon wafers then back fill with photoresist or mounting wax. A diamond tipped dentist burr was used to successfully drill holes in the wafer. This proved unacceptable in that the perimeter of the hole was cracked and chipped. Additionally, the minimum size hole realizable was > 300 μm. The drilled holes could not be arrayed on the wafer to any extent because the wafer would not stand up to the stress of multiple drilling.

Low temperature drive-in of surface-deposited copper in silicon wafers

2004 ◽  
Vol 27 (1-3) ◽  
pp. 435-438 ◽  
Author(s):  
M. L. Polignano ◽  
D. Caputo ◽  
C. Carpanese ◽  
G. Salvà ◽  
L. Vanzetti
Keyword(s):  
Low Temperature ◽  
Silicon Wafers

Recombination Characteristics of Single-Crystalline Silicon Wafers with a Damaged Near-Surface Layer

2013 ◽  
Vol 58 (2) ◽  
pp. 142-150 ◽  
Author(s):  
A.V. Sachenko ◽  
◽  
V.P. Kostylev ◽  
V.G. Litovchenko ◽  
V.G. Popov ◽  
...  
Keyword(s):  
Surface Layer ◽  
Crystalline Silicon ◽  
Silicon Wafers ◽  
Single Crystalline Silicon ◽  
Near Surface ◽  
Single Crystalline

Microcracks in Silicon Wafers I: Inline Detection and Implications of Crack Morphology on Wafer Strength

2016 ◽  
Vol 6 (1) ◽  
pp. 126-135 ◽  
Author(s):  
Matthias Demant ◽  
Tim Welschehold ◽  
Marcus Oswald ◽  
Sebastian Bartsch ◽  
Thomas Brox ◽  
...  
Keyword(s):  
Silicon Wafers ◽  
Crack Morphology

Study of the electrical properties of  Cz p-type solar-grade silicon wafers against the high-temperature processes

2021 ◽  
Vol 127 (6) ◽  
Author(s):  
Mohamed Maoudj ◽  
Djoudi Bouhafs ◽  
Nacer Eddine Bourouba ◽  
Abdelhak Hamida-Ferhat ◽  
Abdelkader El Amrani
Keyword(s):  
High Temperature ◽  
Electrical Properties ◽  
Silicon Wafers ◽  
Solar Grade Silicon ◽  
High Temperature Processes ◽  
Grade Silicon ◽  
P Type

scholarly journals The Influence of Wire Speed on Phase Transitions and Residual Stress in Single Crystal Silicon Wafers Sawn by Resin Bonded Diamond Wire Saw

Micromachines ◽  
2021 ◽  
Vol 12 (4) ◽  
pp. 429
Author(s):  
Tengyun Liu ◽  
Peiqi Ge ◽  
Wenbo Bi
Keyword(s):  
Residual Stress ◽  
Surface Layer ◽  
Phase Transitions ◽  
Single Crystal ◽  
Amorphous Silicon ◽  
Silicon Wafer ◽  
Single Crystal Silicon ◽  
Silicon Wafers ◽  
Crystal Silicon ◽  
Diamond Wire

Lower warp is required for the single crystal silicon wafers sawn by a fixed diamond wire saw with the thinness of a silicon wafer. The residual stress in the surface layer of the silicon wafer is the primary reason for warp, which is generated by the phase transitions, elastic-plastic deformation, and non-uniform distribution of thermal energy during wire sawing. In this paper, an experiment of multi-wire sawing single crystal silicon is carried out, and the Raman spectra technique is used to detect the phase transitions and residual stress in the surface layer of the silicon wafers. Three different wire speeds are used to study the effect of wire speed on phase transition and residual stress of the silicon wafers. The experimental results indicate that amorphous silicon is generated during resin bonded diamond wire sawing, of which the Raman peaks are at 178.9 cm−1 and 468.5 cm−1. The ratio of the amorphous silicon surface area and the surface area of a single crystal silicon, and the depth of amorphous silicon layer increases with the increasing of wire speed. This indicates that more amorphous silicon is generated. There is both compressive stress and tensile stress on the surface layer of the silicon wafer. The residual tensile stress is between 0 and 200 MPa, and the compressive stress is between 0 and 300 MPa for the experimental results of this paper. Moreover, the residual stress increases with the increase of wire speed, indicating more amorphous silicon generated as well.

Experimental investigation into polishing of monocrystalline silicon wafer using double-disc chemical assisted magnetorheological finishing process

2021 ◽  
pp. 095440622098384
Author(s):  
Mayank Srivastava ◽  
Pulak M Pandey
Keyword(s):  
Surface Roughness ◽  
Silicon Wafer ◽  
Flow Rate ◽  
Silicon Wafers ◽  
Monocrystalline Silicon ◽  
Slurry Flow ◽  
Magnetorheological Finishing ◽  
Finishing Process ◽  
Process Factors ◽  
Slurry Flow Rate

In the present work, a novel hybrid finishing process that combines the two preferred methods in industries, namely, chemical-mechanical polishing (CMP) and magneto-rheological finishing (MRF), has been used to polish monocrystalline silicon wafers. The experiments were carried out on an indigenously developed double-disc chemical assisted magnetorheological finishing (DDCAMRF) experimental setup. The central composite design (CCD) was used to plan the experiments in order to estimate the effect of various process factors, namely polishing speed, slurry flow rate, percentage CIP concentration, and working gap on the surface roughness ([Formula: see text]) by DDCAMRF process. The analysis of variance was carried out to determine and analyze the contribution of significant factors affecting the surface roughness of polished silicon wafer. The statistical investigation revealed that percentage CIP concentration with a contribution of 30.6% has the maximum influence on the process performance followed by working gap (21.4%), slurry flow rate (14.4%), and polishing speed (1.65%). The surface roughness of polished silicon wafers was measured by the 3 D optical profilometer. Scanning electron microscopy (SEM) and atomic force microscopy (AFM) were carried out to understand the surface morphology of polished silicon wafer. It was found that the surface roughness of silicon wafer improved with the increase in polishing speed and slurry flow rate, whereas it was deteriorated with the increase in percentage CIP concentration and working gap.

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