Sensitive stages of fruit and seed development of chili pepper (Capsicum annuum L. var. Shishito) exposed to high-temperature stress

2008 ◽  
Vol 117 (1) ◽  
pp. 21-25 ◽  
Author(s):  
P. Pagamas ◽  
E. Nawata
2020 ◽  
Vol 25 (1) ◽  
pp. 19-25
Author(s):  
Iriawati Iriawati ◽  
◽  
Isqim Oktaviani ◽  
Ahmad Faizal ◽  
◽  
...  

2020 ◽  
Vol 18 (1) ◽  
pp. 19-27
Author(s):  
Smaranika Mishra ◽  
R. H. Laxman ◽  
K. Madhavi Reddy ◽  
R. Venugopalan

AbstractBell pepper or sweet pepper (Capsicum annuum L. var. grossum) is highly susceptible to high-temperature stress (HT). Hence, search for donor across C. annuum for HT tolerance was undertaken by following Temperature Induction Response (TIR) technique. The induction and challenging temperature requirement for TIR screening were standardized in 1 d-old Capsicum seedlings. Forty Capsicum genotypes were evaluated based on the recovery growth (RG) and per cent reduction in recovery growth (%RRG) of the seedlings. The genotypes Punjab Guchhedar and Ajeet 1 were found to have maximum cellular level tolerance (CLT) to HT with higher RG and lower %RRG compared to the non-induced seedlings and HDC 75 was found to have minimum CLT. In order to confirm the findings, another experiment was conducted under managed stress and control conditions. Absolute yield obtained from both the environments were used to calculate stress tolerance indices such as heat susceptibility index, tolerance index, stress tolerance index, mean productivity, geometric mean productivity and yield stability index. Based on these tolerance indices, Punjab Guchhedar and Ajeet 1 were found to be highly tolerant and HDC 75 as highly susceptible. Further, the combined result of TIR and tolerance indices also gave the same result confirming Punjab Guchhedar and Ajeet 1 can be used as a donor for the future breeding programme aimed at evolving high-temperature-tolerant bell pepper cultivars. The result also confirms the fitness of TIR technique to screen Capsicum genotypes for tolerance to HT based on variability in acquired thermotolerance.


2010 ◽  
Vol 27 (1) ◽  
pp. 67-73 ◽  
Author(s):  
Kao-Chih She ◽  
Hiroaki Kusano ◽  
Mitsuhiro Yaeshima ◽  
Tadamasa Sasaki ◽  
Hikaru Satoh ◽  
...  

2020 ◽  
Vol 53 (2) ◽  
Author(s):  
Khalil Ahmed Laghari ◽  
Abdul Jabbar Pirzada ◽  
Mahboob Ali Sial ◽  
Muhammad Athar Khan ◽  
Jamal Uddin Mangi

2020 ◽  
Vol 52 (5) ◽  
Author(s):  
De-Gong Wu ◽  
Qiu-Wen Zhan ◽  
Hai-Bing Yu ◽  
Bao-Hong Huang ◽  
Xin-Xin Cheng ◽  
...  

Author(s):  
D-J Kim ◽  
I-G Kim ◽  
J-Y Noh ◽  
H-J Lee ◽  
S-H Park ◽  
...  

Abstract As DRAM technology extends into 12-inch diameter wafer processing, plasma-induced wafer charging is a serious problem in DRAM volume manufacture. There are currently no comprehensive reports on the potential impact of plasma damage on high density DRAM reliability. In this paper, the possible effects of floating potential at the source/drain junction of cell transistor during high-field charge injection are reported, and regarded as high-priority issues to further understand charging damage during the metal pad etching. The degradation of block edge dynamic retention time during high temperature stress, not consistent with typical reliability degradation model, is analyzed. Additionally, in order to meet the satisfactory reliability level in volume manufacture of high density DRAM technology, the paper provides the guidelines with respect to plasma damage. Unlike conventional model as gate antenna effect, the cell junction damage by the exposure of dummy BL pad to plasma, was revealed as root cause.


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