Dc characterization of lateral bipolar devices in standard CMOS technology: a new model for base current partitioning

1999 ◽  
Vol 43 (5) ◽  
pp. 883-889 ◽  
Author(s):  
F. Corsi ◽  
M. Di Ciano ◽  
C. Marzocca
Keyword(s):  
Cmos Technology ◽  
New Model ◽  
Base Current ◽  
Bipolar Devices ◽  
Dc Characterization

Nanoprobe Characterization of Soft SRAM bit Fails in Advanced Technologies

2019 ◽  
Author(s):  
Satish Kodali ◽  
Chen Zhe ◽  
Chong Khiam Oh
Keyword(s):  
Yield Loss ◽  
Performance Metrics ◽  
Root Cause ◽  
Advanced Technologies ◽  
Capacitance Voltage ◽  
Defect Localization ◽  
Cv Measurements ◽  
Lightly Doped Drain ◽  
Dc Characterization

Abstract Nanoprobing is one of the key characterization techniques for soft defect localization in SRAM. DC transistor performance metrics could be used to identify the root cause of the fail mode. One such case report where nanoprobing was applied to a wafer impacted by significant SRAM yield loss is presented in this paper where standard FIB cross-section on hard fail sites and top down delayered inspection did not reveal any obvious defects. The authors performed nanoprobing DC characterization measurements followed by capacitance-voltage (CV) measurements. Two probe CV measurement was then performed between the gate and drain of the device with source and bulk floating. The authors identified valuable process marginality at the gate to lightly doped drain overlap region. Physical characterization on an inline split wafer identified residual deposits on the BL contacts potentially blocking the implant. Enhanced cleans for resist removal was implemented as a fix for the fail mode.

Analysis of an Anomalous Transistor Exhibiting Dual-Vt Characteristics and Its Cause in a 90nm Node CMOS Technology

2012 ◽  
Author(s):  
Yuk L. Tsang ◽  
Xiang D. Wang ◽  
Reyhan Ricklefs ◽  
Jason Goertz
Keyword(s):  
Threshold Voltage ◽  
Electrical Characterization ◽  
Cmos Technology ◽  
Short Channel ◽  
Visual Defect ◽  
Subthreshold Region ◽  
Short Channel Effect ◽  
Channel Effect ◽  
Transistor Model

Abstract In this paper, we report a transistor model that has successfully led to the identification of a non visual defect. This model was based on detailed electrical characterization of a MOS NFET exhibiting a threshold voltage (Vt) of just about 40mv lower than normal. This small Vt delta was based on standard graphical extrapolation method in the usual linear Id-Vg plots. We observed, using a semilog plot, two slopes in the Id-Vg curves with Vt delta magnified significantly in the subthreshold region. The two slopes were attributed to two transistors in parallel with different Vts. We further found that one of the parallel transistors had short channel effect due to a punch-through mechanism. It was proposed and ultimately confirmed the cause was due to a dopant defect using scanning capacitance microscopy (SCM) technique.

Characterization of sub-THz detection array in 0.18 μm CMOS technology

2016 ◽  
Author(s):  
Jixin Chen ◽  
Weitian Liu ◽  
Pinpin Yan ◽  
Chenwei Jia ◽  
Debing Hou ◽  
...  
Keyword(s):  
Cmos Technology ◽  
Thz Detection

DC Characterization of AC Current Shunts for Wideband Power Applications

2011 ◽  
Vol 60 (7) ◽  
pp. 2191-2194 ◽  
Author(s):  
Gert Rietveld ◽  
J. H. N. van der Beek ◽  
Ernest Houtzager
Keyword(s):  
Ac Current ◽  
Dc Characterization

scholarly journals Characterization of the HeCo Mutant Mouse: A New Model of Subcortical Band Heterotopia Associated with Seizures and Behavioral Deficits

2008 ◽  
Vol 19 (3) ◽  
pp. 563-575 ◽  
Author(s):  
Alexandre Croquelois ◽  
Fabienne Giuliani ◽  
Christine Savary ◽  
Michel Kielar ◽  
Clotilde Amiot ◽  
...  
Keyword(s):  
Mutant Mouse ◽  
Behavioral Deficits ◽  
New Model ◽  
Subcortical Band Heterotopia ◽  
Band Heterotopia
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