Low-voltage single power supply four-quadrant multiplier using floating-gate MOSFETs

1998 ◽  
Vol 145 (1) ◽  
pp. 40 ◽  
Author(s):  
J.-J. Chen ◽  
S.-I. Liu ◽  
Y.-S. Hwang
2014 ◽  
Vol 918 ◽  
pp. 313-318
Author(s):  
Jesús de la Cruz-Alejo ◽  
L. Noe Oliva-Moreno

In this paper a low voltage FGMOS analog multiplier is proposed that uses a follower voltage flipped (FVF), which dominates its operation. In order to reduce the power supply of the multiplier, floating gate CMOS transistors (FGMOS) are used. Theoretical steps of the FVF design are presented together with its simulation. The output of the FVF is insensitive to the device parameters and is loaded with a resistive load. The multiplier design consists of two FVF cells, two current sensors FVF and one Gilbert cell multiplier. The results show that the proposed multiplied in a 0.13μm CMOS process exhibits significant benefits in terms of linearity, insensibility to device parameters, bandwidth and output impedance. The power supply is 0.8V and a power consumption of 181μW.


2012 ◽  
Vol 263-266 ◽  
pp. 980-985
Author(s):  
Xin Liang Cao ◽  
Yan Hu Fan ◽  
Jian Xin Li

In order to adapt to low-voltage operating of the Gilbert CMOS integrated mixer, a novel mixer is researched which with floating gate amplify transistor and a few stack from the power supply to the ground. The mixer had some advantages that are avoided the input DC voltage imbalance and suppressed 1/ f noise. The mixing feasibility is confirmed by time domain simulation, and the mixing output signal quality is analyzed by spectrum simulation. The results show that the mixer output main spectrum is the difference for various frequency input signal. The main-spectrum is more than 6dB with three order inter-modulation interference amplitude.


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