scholarly journals ATLAS Level-1 Endcap Muon Trigger for Run 3

2020 ◽  
Vol 245 ◽  
pp. 01002
Author(s):  
Atsushi Mizukami
Keyword(s):  
Data Transfer ◽  
Phase 1 ◽  
Hadron Collider ◽  
High Transverse Momentum ◽  
Readout System ◽  
Trigger System ◽  
Muon Trigger ◽  
Combining Data ◽  
Level 1 ◽  
High Event

The Large Hadron Collider is expected to operate with a centre-ofmass energy of 14 TeV and an instantaneous luminosity of 2.0 1034 cm−2s−1 for Run 3 scheduled from 2021 to 2024. In order to cope with the high event rate, an upgrade of the ATLAS trigger system is required. The level-1 endcap muon trigger system identifies muons with high transverse momentum by combining data from fast muon trigger detectors, called Thin Gap Chambers on the Big Wheel. Inner muon detectors (the Small Wheel and the Tile Calorimeter) coincidence was introduced to reduce fake muon contamination. In the ongoing Phase-1 upgrade the present Small Wheel is replaced with the New Small Wheel and additional Resistive Plate Chambers are installed in the inner region of the ATLAS muon spectrometer for the endcap muon trigger. Precision track information from the new detectors can be used as part of the muon trigger logic to enhance the performance significantly. The trigger processor board, Sector Logic, has been upgraded to handle the additional data from the new detectors. The new Sector Logic board has a modern FPGA to make use of Multi-Gigabit transceiver technology, which is used to receive data from the new detectors. The readout system for trigger data has also been re-designed to minimize the use of custom electronics and instead use commercial computers and network switches, by using TCP/IP for the data transfer. The new readout system uses a software-based data-handling. This paper describes the development of the level-1 endcap muon trigger and its readout system for Run 3.

scholarly journals Integration and Commissioning of the Software-based Readout System for ATLAS Level-1 Endcap Muon Trigger in Run 3

2021 ◽  
Vol 251 ◽  
pp. 04015
Author(s):  
Kaito Sugizaki
Keyword(s):  
High Speed ◽  
Hadron Collider ◽  
Serial Links ◽  
Readout System ◽  
Muon Trigger ◽  
Momentum Resolution ◽  
Level 1 ◽  
Trigger Algorithm ◽  
And Performance ◽  
Online Software

The Large Hadron Collider and the ATLAS experiment at CERN will explore new frontiers in physics in Run 3 starting in 2022. In the Run 3 ATLAS Level-1 endcap muon trigger, new detectors called New Small Wheel and additional Resistive Plate Chambers will be installed to improve momentum resolution and to enhance the rejection of fake muons. The Level-1 endcap muon trigger algorithm will be processed by new trigger processor boards with modern FPGAs and high-speed optical serial links. For validation and performance evaluation, the inputs and outputs of their trigger logic will be read out using a newly developed software-based readout system. We have successfully integrated this readout system in the ATLAS online software framework, enabling commissioning in the actual Run 3 environment. Stable trigger readout has been realized for input rates up to 100 kHz with a developed event-building application. We have verified that its performance is sufficient for Run 3 operation in terms of event data size and trigger rate. The paper will present the details of the integration and commissioning of the software-based readout system for ATLAS Level-1 endcap muon trigger in Run 3.

scholarly journals Run Control Software For The Upgrade Of The Atlas Muon To Central Trigger Processor Interface (MUCTPI)

2019 ◽  
Vol 214 ◽  
pp. 01034
Author(s):  
Ralf Spiwoks ◽  
Aaron Armbruster ◽  
German Carrillo-Montoya ◽  
Magda Chelstowska ◽  
Patrick Czodrowski ◽  
...  
Keyword(s):  
Hadron Collider ◽  
Programmable Logic ◽  
Trigger System ◽  
Control Software ◽  
Atlas Experiment ◽  
Arm Processor ◽  
Level 1 ◽  
On Chip ◽  
Control Application ◽  
Processor Cores

The Muon to Central Trigger Processor Interface (MUCTPI) of the ATLAS experiment at the Large Hadron Collider(LHC) at CERN is being upgraded for the next run of the LHC in order to use optical inputs and to provide full-precision information for muon candidates to the topological trigger processor (L1TOPO) of the Level-1 trigger system. The new MUCTPI is implemented as a single ATCA blade with high-end processing FPGAs which eliminate doublecounting of muon candidates in overlapping regions, send muon candidates to L1TOPO, and muon multiplicities tothe Central Trigger Processor (CTP), as well as readout data to the data acquisition system of the experiment. A Xilinx Zynq System-on-Chip (SoC) with a programmable logic part and a processor part is used for the communication to the processing FPGAs and the run control system. The processor part, based on ARM processor cores, is running embedded Linux prepared using the framework of the Linux Foundation's Yocto project. The ATLAS run control software was ported to the processor part and a run control application was developed which receives, at configuration, all data necessary for the overlap handling and candidate counting of the processing FPGAs. During running, the application provides ample monitoring of the physics data and of the operation of the hardware. *

scholarly journals The ATLAS Level-1 topological processor: Experience and upgrade plans

2020 ◽  
Vol 35 (34n35) ◽  
pp. 2044008
Author(s):  
Carlos Moreno Martínez
Keyword(s):  
Hadron Collider ◽  
Heavy Flavor ◽  
Trigger System ◽  
Hadronic Jets ◽  
Proton Proton ◽  
Background Rejection ◽  
Innovative System ◽  
Level 1 ◽  
And Performance ◽  
Performance Results

During Run 2 (2015–2018) the Large Hadron Collider has provided, at the World’s highest energy frontier, proton–proton collisions to the ATLAS experiment with high instantaneous luminosity (up to [Formula: see text]), placing stringent operational and physics requirements on the ATLAS trigger system in order to reduce the 40 MHz collision rate to a manageable event storage rate of 1 kHz, while not rejecting interesting collisions. The Level-1 trigger is the first rate-reducing step in the ATLAS trigger system with an output rate of up to 100 kHz and decision latency of less than 2.5 [Formula: see text]s. In Run 2, an important role was played by the Level-1 Topological Processor (L1Topo). This innovative system consists of two blades designed in AdvancedTCA form factor, mounting four individual state-of-the-art processors, and providing high input bandwidth and low latency data processing. Up to 128 topological trigger algorithms can be implemented to select interesting events by applying kinematic and angular requirements on electromagnetic clusters, hadronic jets, muons and total energy reconstructed in the ATLAS apparatus. This resulted in a significantly improved background rejection and enhanced acceptance of physics signal events, despite the increasing luminosity. The L1Topo system has become more and more important for physics analyses making use of low energy objects, commonly present in the Heavy Flavor or Higgs physics events, for example. An overview of the L1Topo architecture, simulation and performance results during Run 2 is presented alongside with upgrade plans for the L1Topo system to be installed for the future Run 3 data taking period.

scholarly journals Software-based data acquisition system for Level-1 end-cap muon trigger in Atlas Run-3

2019 ◽  
Vol 214 ◽  
pp. 01036 ◽  
Author(s):  
Kosuke Takeda
Keyword(s):  
Data Acquisition ◽  
Data Acquisition System ◽  
Acquisition System ◽  
Readout System ◽  
Track Reconstruction ◽  
Muon Trigger ◽  
Reconstruction Performance ◽  
Computing Industry ◽  
Develop Software ◽  
Level 1

In 2019, the ATLAS experiment at CERN is planning an upgrade in order to cope with the higher luminosity requirements. In this upgrade, the installation of the new muon chambers for the end-cap muon system will be carriedout. Muon track reconstruction performance can be improved, and fake triggers can be reduced. It is also necessary to develop readout system of trigger data for the Level-1 end-cap muon trigger. We have decided to develop software-based data acquisition system. There-fore, we have implemented SiTCP technology, which connects a FPGA with the network, on the FPGA of new trigger processor boards. Due to this implementation, the new DAQ system can take advantage of the latest developments in computing industry. This new readout system architec-ture is based on multi-process software, and can assemble events at a rate of 100 kHz. For data collection, the 10 Gbit Ethernet network switch is used. Moreover, we have optimized these processes to send data to the following sys-tem without any error. Therefore, the built events can be sent with an average throughput of approximately 211 Mbps. Our newly developed readout system is very generic and it is flexible for modi-fications, extensions and easyto debug. This paper will present the details of the new software-based DAQ system and report the development status for ATLAS Run-3.

scholarly journals The Impact of Applying Wildcards to Disabled Modules for Ftk Pattern Banks on Efficiency and Data Flow

2019 ◽  
Vol 214 ◽  
pp. 01039
Author(s):  
Khalil Bouaouda ◽  
Stefan Schmitt ◽  
Driss Benchekroun
Keyword(s):  
Early Stage ◽  
Hadron Collider ◽  
Track Reconstruction ◽  
Trigger System ◽  
Level Trigger ◽  
Efficiency Losses ◽  
Level 1 ◽  
High Level ◽  
The Impact ◽  
Fast Tracker

Online selection is an essential step to collect the most relevant collisions from the very large number of collisions inside the ATLAS detector at the Large Hadron Collider (LHC). The Fast TracKer (FTK) is a hardware based track finder, built to greatly improve the ATLAS trigger system capabilities for identifying interesting physics processes through track-based signatures. The FTK is reconstructing after each Level-1 trigger all tracks with pT > 1 GeV, such that the high-level trigger system gains access to track information at an early stage. FTK track reconstruction starts with a pattern recognition step. Patterns are found with hits in seven out of eight possible detector layers. Disabled detector modules, as often encountered during LHC operation, lead to efficiency losses. To recover efficiency, WildCards (WC) algorithms are implemented in the FTK system. The WC algorithm recovers inefficiency but also causes high combinatorial background and thus increased data volumes in the FTK system, possibly exceeding hardware limitations. To overcome this, a refined algorithm to select patterns is developed and investigated in this article.

THE $D\emptyset$ LEVEL 1 TRIGGER SYSTEM

2001 ◽  
Vol 16 (supp01c) ◽  
pp. 1162-1165
Author(s):  
◽  
ROB McCROSKEY
Keyword(s):  
Error Rates ◽  
Coaxial Cable ◽  
Muon Detector ◽  
Serial Links ◽  
Trigger System ◽  
Muon Trigger ◽  
Beam Experiment ◽  
Tube Arrays ◽  
Simulation Results ◽  
Level 1

We describe the Level 1 muon trigger system for Run II of the [Formula: see text] colliding beam experiment at the Fermilab Tevatron. The muon trigger logic makes use of tracks from the central fiber tracker and hits from muon detector elements which include both scintillator and drift tube arrays. Details of the FPGA trigger logic and trigger simulation results are given. Extensive use is made of Gbit/s serial links in order to transmit data to the Level 1 muon trigger system. Results on error rates from these Gbit/s serial links using up to 200 feet of coaxial cable are presented.

scholarly journals Triggering long-lived particles in HL-LHC and the challenges in the first stage of the trigger system

2020 ◽  
Vol 2020 (8) ◽  
Author(s):  
Biplob Bhattacherjee ◽  
Swagata Mukherjee ◽  
Rhitaja Sengupta ◽  
Prabhat Solanki
Keyword(s):  
Large Hadron Collider ◽  
Hadron Collider ◽  
High Luminosity ◽  
Trigger System ◽  
Pile Up ◽  
The Future ◽  
Level 1

Abstract Triggering long-lived particles (LLPs) at the first stage of the trigger system is very crucial in LLP searches to ensure that we do not miss them at the very beginning. The future High Luminosity runs of the Large Hadron Collider will have increased number of pile-up events per bunch crossing. There will be major upgrades in hardware, firmware and software sides, like tracking at level-1 (L1). The L1 trigger menu will also be modified to cope with pile-up and maintain the sensitivity to physics processes. In our study we found that the usual level-1 triggers, mostly meant for triggering prompt particles, will not be very efficient for LLP searches in the 140 pile-up environment of HL-LHC, thus pointing to the need to include dedicated L1 triggers in the menu for LLPs. We consider the decay of the LLP into jets and develop dedicated jet triggers using the track information at L1 to select LLP events. We show in our work that these triggers give promising results in identifying LLP events with moderate trigger rates.

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