A theoretical model to study the performance of a GaN HEMT under electron velocity saturation

2021 ◽  
Author(s):  
Prabir Shit ◽  
Radha Raman Pal ◽  
Sutanu Dutta
1990 ◽  
Vol 37 (3) ◽  
pp. 530-535 ◽  
Author(s):  
C.-J. Han ◽  
P.P. Ruden ◽  
T.E. Nohava ◽  
D.H. Narum ◽  
D.E. Grider ◽  
...  

2007 ◽  
Vol 91 (25) ◽  
pp. 252104 ◽  
Author(s):  
Jacob Khurgin ◽  
Yujie J. Ding ◽  
Debdeep Jena

1999 ◽  
Vol 572 ◽  
Author(s):  
J. D. Albrecht ◽  
P. P. Rudento ◽  
S. C. Binari ◽  
K. Ikossi-Anastasiou ◽  
M. G. Ancona ◽  
...  

ABSTRACTResults of a systematic study of the current vs. voltage characteristics of ungated AIGaN/GaN heterostructures grown on sapphire substrates are presented. It is experimentally observed that the saturation current nearly doubles as the source-to-drain channel lengths decrease from 11.8 to 1.7μm. The average electric field at which current saturation occurs is 10 to 30kV/cm, i.e. much less than the electron velocity saturation field. The experimental data is interpreted in the framework of a new model that takes into account the non-uniformity of the electron density in the channel, electron velocity saturation, and thermal effects. The temperature dependent electron transport characteristics of the model are based on Monte Carlo simulations of electron transport in GaN. It is shown that appreciable contact resistance, which leads to partial channel depletion near the source, and significant self-heating of the devices under high drain-to-source bias are the main reasons for the observed current saturation. The effective ambient temperature in the channel of the devices is calculated from a two-dimensional thermal model of heat dissipation through the sapphire substrate. Equilibrium channel carrier concentrations and low-field mobilities are determined from Hall effect data. The ungated structures are demonstrated to provide much useful materials and process characterization data for the development of AIGaN/GaN heterostructure field effect transistors.


2019 ◽  
Vol 2019 ◽  
pp. 1-7
Author(s):  
Haifeng Mo ◽  
Yaohui Zhang ◽  
Helun Song

This paper discusses linearity and robustness together for the first time, disclosing a way to improve them. It reveals that the nonlinear transconductance with device working at quasi-saturation region is significant factor of device linearity. The peak electric field is the root cause of electron velocity saturation. The high electric field at the drift region near the drain will cause more electron-hole pairs generated to trigger the parasitic NPN transistor turn-on, which may cause failure of device. Devices with different drift region doping are simulated with TCAD and measured. With LDD4 doping, the peak electric field in the drift region is reduced; the linear region of the transconductance is broadened. The adjacent channel power ratio is decreased by 2 dBc; 12% more power can be discharged before the NPN transistor turn-on, indicating a better linearity and robustness.


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