A Robust Algorithm for PAM4 Eye-Diagram Analysis

2021 ◽  
Author(s):  
Jeffrey A. Jargon ◽  
Jerome Cheron
Keyword(s):  
Eye Diagram ◽  
Robust Algorithm ◽  
Diagram Analysis

A Robust Algorithm for Eye-Diagram Analysis

2008 ◽  
Vol 26 (21) ◽  
pp. 3592-3600 ◽  
Author(s):  
Jeffrey A. Jargon ◽  
C. M. Jack Wang ◽  
Paul D. Hale
Keyword(s):  
Eye Diagram ◽  
Robust Algorithm ◽  
Diagram Analysis

Statistical Eye Diagram Analysis Based on Double-Edge Responses for Coding Buses

2020 ◽  
Vol 62 (3) ◽  
pp. 902-913
Author(s):  
Xiuqin Chu ◽  
Wenwu Wang ◽  
Jun Wang ◽  
Xiangyu Dai ◽  
Jun Fan ◽  
...  
Keyword(s):  
Eye Diagram ◽  
Double Edge ◽  
Diagram Analysis

A Statistical Study of De-Embedding Applied to Eye Diagram Analysis

2012 ◽  
Vol 61 (2) ◽  
pp. 475-488 ◽  
Author(s):  
Paul D. Hale ◽  
Jeffrey Jargon ◽  
C. M. Jack Wang ◽  
Brett Grossman ◽  
Mathew Claudius ◽  
...  
Keyword(s):  
Statistical Study ◽  
Eye Diagram ◽  
Diagram Analysis

scholarly journals Reliable Eye-Diagram Analysis of Data Links via Device Macromodels

2006 ◽  
Vol 29 (1) ◽  
pp. 31-38 ◽  
Author(s):  
I.S. Stievano ◽  
I.A. Maio ◽  
F.G. Canavero ◽  
C. Siviero
Keyword(s):  
Eye Diagram ◽  
Data Links ◽  
Diagram Analysis

Fast Eye Diagram Analysis for High-Speed CMOS Circuits

2015 ◽  
Author(s):  
Seyed Nematollah Ahmadyan ◽  
Chenjie Gu ◽  
Suriyaprakash Natarajan ◽  
Eli Chiprout ◽  
Shobha Vasudevan
Keyword(s):  
High Speed ◽  
Cmos Circuits ◽  
Eye Diagram ◽  
Diagram Analysis

Design Methodology of High Frequency M-ary ASK, FSK and QAM

2015 ◽  
Vol 24 (10) ◽  
pp. 1550152 ◽  
Author(s):  
Mousumi Bhanja ◽  
Surya Prakash Tamang ◽  
Ritika Das ◽  
Baidyanath Ray
Keyword(s):  
High Frequency ◽  
High Speed ◽  
Design Methodology ◽  
Low Voltage ◽  
Signal Distortion ◽  
Eye Diagram ◽  
High Data ◽  
Transconductance Amplifier ◽  
Level Converter ◽  
Diagram Analysis

This paper proposes a high data rate, low-power, low-voltage design of OTA-based M-ary ASK, FSK and QAM modulator and demodulator circuits. Conventional D/A converter of M-ary circuit has been replaced with the operational transconductance amplifier-based n-bits to 2n level converter which operates with input frequencies up to 2.1 GHz. OTA-based oscillator and PLL is being designed for high speed M-ary FSK. Eye diagram analysis has been carried out, conforming a very low signal distortion. Theoretical analysis of bit error rate has been done. The circuit analysis and simulation results confirm the reliability and accuracy of the design. Effective layouts and die photographs of the proposed designs are also presented.

Study of Signal Transmission for SIP and POP

2012 ◽  
Vol 220-223 ◽  
pp. 2297-2300 ◽  
Author(s):  
Ling Feng Shi ◽  
Cheng Shan Cai ◽  
Yuan Ming Xiao ◽  
Li Ye Cheng ◽  
Chen Meng ◽  
...  
Keyword(s):  
Signal Integrity ◽  
Signal Transmission ◽  
Equivalent Model ◽  
Signal Quality ◽  
Eye Diagram ◽  
Noise Interference ◽  
Transmission Quality ◽  
Simulation Results ◽  
Return Path ◽  
Diagram Analysis

With the electronic toward miniaturization and multifunctional development, such as System-in-Package (SIP), Package-on-Package (POP), these packages have been widely used. Signal speeds increase and then require that signal has a good transmission quality. Therefore the design of signal integrity should take into account these issues from the beginning design. In this paper, a model about the wire bonding transmission problem between the upper and lower levels of chip is proposed. The simulation results are shown at the different height and radius of the equivalent model. Meanwhile, researching in different cases, noise interference source makes the influence on signal quality. Finally, by adding the signal return path, signal integrity is achieved well by the eye diagram analysis.

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