An Investigation on Key Technologies for On-chip Optical Interconnection

Author(s):  
Lehao Wang
2012 ◽  
Vol E95.C (7) ◽  
pp. 1244-1251 ◽  
Author(s):  
Koji TAKEDA ◽  
Tomonari SATO ◽  
Takaaki KAKITSUKA ◽  
Akihiko SHINYA ◽  
Kengo NOZAKI ◽  
...  

2006 ◽  
Vol 970 ◽  
Author(s):  
Manabu Bonkohara ◽  
Makoto Motoyoshi ◽  
Kazutoshi Kamibayashi ◽  
Mitsumasa Koyanagi

ABSTRACTRecently the development of three dimensional LSI (3D-LSI) has been accelerated and its stage has changed from the research level or limited production level to the investigation level with a view to mass production. This paper describes the current and the future 3D-LSI technologies which we have considered and imagined. The current technology is taken our Chip Size Package (CSP) for sensor device, for instance. In the future technology, there are the five key technologies are described. And considering con and pro of the current 3D LSI stacked approach, such as CoC (Chip on Chip), CoW (Chip on Wafer) and WoW (Wafer on Wafer), We confirmed that CoW combined with Super-Smart-Stack (SSS™) technology will shorten the process time per chip at the same level as WoW approach and is effective to minimize process cost.


2018 ◽  
Vol 11 (12) ◽  
pp. 122201 ◽  
Author(s):  
Yongjin Wang ◽  
Xin Wang ◽  
Jialei Yuan ◽  
Xumin Gao ◽  
Bingcheng Zhu

2010 ◽  
Vol 18 (15) ◽  
pp. 15440 ◽  
Author(s):  
Kazuya Ohira ◽  
Kentaro Kobayashi ◽  
Norio Iizuka ◽  
Haruhiko Yoshida ◽  
Mizunori Ezaki ◽  
...  

2007 ◽  
Author(s):  
S. Saito ◽  
D. Hisamoto ◽  
H. Shimizu ◽  
H. Hamamura ◽  
R. Tsuchiya ◽  
...  

2006 ◽  
Author(s):  
Kenichi Nishi ◽  
Junichi Fujikata ◽  
Hirohito Yamada ◽  
Tsutomu Ishi ◽  
Masafumi Nakada ◽  
...  

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