Current and Future Three-Dimensional LSI Integration Technology by “chip on chip”, “chip on wafer” and “wafer on wafer”

2006 ◽  
Vol 970 ◽  
Author(s):  
Manabu Bonkohara ◽  
Makoto Motoyoshi ◽  
Kazutoshi Kamibayashi ◽  
Mitsumasa Koyanagi
Keyword(s):  
Three Dimensional ◽  
Process Time ◽  
Future Technology ◽  
Sensor Device ◽  
Research Level ◽  
Key Technologies ◽  
The Future ◽  
Chip Size ◽  
On Chip ◽  
Chip Chip

ABSTRACTRecently the development of three dimensional LSI (3D-LSI) has been accelerated and its stage has changed from the research level or limited production level to the investigation level with a view to mass production. This paper describes the current and the future 3D-LSI technologies which we have considered and imagined. The current technology is taken our Chip Size Package (CSP) for sensor device, for instance. In the future technology, there are the five key technologies are described. And considering con and pro of the current 3D LSI stacked approach, such as CoC (Chip on Chip), CoW (Chip on Wafer) and WoW (Wafer on Wafer), We confirmed that CoW combined with Super-Smart-Stack (SSS™) technology will shorten the process time per chip at the same level as WoW approach and is effective to minimize process cost.

scholarly journals Electromechanically reconfigurable optical nano-kirigami

2021 ◽  
Vol 12 (1) ◽  
Author(s):  
Shanshan Chen ◽  
Zhiguang Liu ◽  
Huifeng Du ◽  
Chengchun Tang ◽  
Chang-Yin Ji ◽  
...  
Keyword(s):  
Near Infrared ◽  
Large Range ◽  
Three Dimensional ◽  
High Contrast ◽  
Si Substrate ◽  
High Modulation ◽  
Gold Nanostructure ◽  
Infrared Wavelengths ◽  
On Chip ◽  
Nano Electromechanical System

AbstractKirigami, with facile and automated fashion of three-dimensional (3D) transformations, offers an unconventional approach for realizing cutting-edge optical nano-electromechanical systems. Here, we demonstrate an on-chip and electromechanically reconfigurable nano-kirigami with optical functionalities. The nano-electromechanical system is built on an Au/SiO2/Si substrate and operated via attractive electrostatic forces between the top gold nanostructure and bottom silicon substrate. Large-range nano-kirigami like 3D deformations are clearly observed and reversibly engineered, with scalable pitch size down to 0.975 μm. Broadband nonresonant and narrowband resonant optical reconfigurations are achieved at visible and near-infrared wavelengths, respectively, with a high modulation contrast up to 494%. On-chip modulation of optical helicity is further demonstrated in submicron nano-kirigami at near-infrared wavelengths. Such small-size and high-contrast reconfigurable optical nano-kirigami provides advanced methodologies and platforms for versatile on-chip manipulation of light at nanoscale.

scholarly journals High-Performance On-Chip Silicon Beamsplitter Based on Subwavelength Metamaterials for Enhanced Fabrication Tolerance

Nanomaterials ◽  
2021 ◽  
Vol 11 (5) ◽  
pp. 1304
Author(s):  
Raquel Fernández de Cabo ◽  
David González-Andrade ◽  
Pavel Cheben ◽  
Aitor V. Velasco
Keyword(s):  
Integrated Circuits ◽  
Fundamental Mode ◽  
High Performance ◽  
Three Dimensional ◽  
High Sensitivity ◽  
Power Splitting ◽  
Excess Loss ◽  
Power Splitters ◽  
On Chip ◽  
Efficient Power

Efficient power splitting is a fundamental functionality in silicon photonic integrated circuits, but state-of-the-art power-division architectures are hampered by limited operational bandwidth, high sensitivity to fabrication errors or large footprints. In particular, traditional Y-junction power splitters suffer from fundamental mode losses due to limited fabrication resolution near the junction tip. In order to circumvent this limitation, we propose a new type of high-performance Y-junction power splitter that incorporates subwavelength metamaterials. Full three-dimensional simulations show a fundamental mode excess loss below 0.1 dB in an ultra-broad bandwidth of 300 nm (1400–1700 nm) when optimized for a fabrication resolution of 50 nm, and under 0.3 dB in a 350 nm extended bandwidth (1350–1700 nm) for a 100 nm resolution. Moreover, analysis of fabrication tolerances shows robust operation for the fundamental mode to etching errors up to ± 20 nm. A proof-of-concept device provides an initial validation of its operation principle, showing experimental excess losses lower than 0.2 dB in a 195 nm bandwidth for the best-case resolution scenario (i.e., 50 nm).

A new efficient multi‐task applications mapping for three‐dimensional Network‐on‐Chip based MPSoC

2021 ◽  
Author(s):  
Khadidja Gaffour ◽  
Mohammed Kamel Benhaoua ◽  
Abou El Hassan Benyamina ◽  
Amit Kumar Singh
Keyword(s):  
Three Dimensional ◽  
Network On Chip ◽  
Dimensional Network ◽  
On Chip

Application and Research of Digital Technology in Optimal Design of CNC Floor Boring and Milling Machine

2012 ◽  
Vol 429 ◽  
pp. 111-115
Author(s):  
Zhen Long Leng ◽  
Jin Feng Yang ◽  
Qun Ping Liu ◽  
Xun Deng
Keyword(s):  
Numerical Simulation ◽  
Optimal Design ◽  
Digital Technology ◽  
Three Dimensional ◽  
Milling Machine ◽  
Machine Model ◽  
Digital Modeling ◽  
Key Technologies ◽  
The Cost ◽  
Interference Checking

This paper focuses on application of the three-dimensional digital modeling, numerical analysis and optimization, digital control and other key technologies which provide technical support for the design and development in CNC floor boring and milling machine manufactruing. The three-dimensional digital modeling, digital assembly, interference checking help to eliminate some hidden trouble before processing and assembly. Numerical simulation reduces the cost and shortens the cycle of designand manufactruing in the optimal design of the machine. This technique has been successfully applied to a CNC Floor Boring and Milling Machine Model, which has been running for three years and achieved satisfactary economic result.

Key Technologies Research on Color Contour Map of 3D Injection Molding Simulation Results

2012 ◽  
Vol 217-219 ◽  
pp. 1998-2001
Author(s):  
Tie Geng ◽  
Qing Hai Ren ◽  
Wei Qing Tu ◽  
Dan Dan Liu
Keyword(s):  
Injection Molding ◽  
Color Image ◽  
Three Dimensional ◽  
Physical Field ◽  
Contour Map ◽  
Image Rendering ◽  
Color Range ◽  
Key Technologies ◽  
Injection Molding Simulation ◽  
Simulation Results

According to the color contour map of the 3D injection molding simulation results, the commonly used color contour map drawing algorithm was researched, and a three-dimensional color image rendering algorithm which based on the "physical field values and color range mapping" was given too. And the key technologies of the algorithm which was used to draw 3D color contour map were introduced in detail. In the end, an example was given.

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