Early Error Detection and Classification in Data Transfer Scheduling

Author(s):  
Mehmet Balman ◽  
Tevfik Kosar
Author(s):  
María Magdalena Añino ◽  
Gabriela Merino ◽  
Alberto Miyara ◽  
Marisol Perassi ◽  
Emiliano Ravera ◽  
...  

2021 ◽  
Vol 38 (1) ◽  
pp. 159-168
Author(s):  
SIMONA MOTOGNA ◽  
◽  
DIANA CRISTEA ◽  
DIANA ȘOTROPA MOLNAR ◽  
◽  
...  

Tools that focus on static code analysis for early error detection are of utmost importance in software development, especially since the propagation of errors is strongly related to higher costs in the development process. Formal Concept Analysis is a prominent field of applied mathematics that uses conceptual landscapes to discover and represent maximal clusters of data. Its expressive visualization method makes it suitable for exploratory analyses in different fields. In this paper we present a Formal Concept Analysis framework for static code analysis that can serve as a model for quantitative and qualitative exploration and interpretation of such results.


Author(s):  
Daniel N. Owunwanne

Data transmitted from one location to the other has to be transferred reliably. Usually, error control coding algorithm provides the means to protect data from errors. Unfortunately, in many cases the physical link can not guarantee that all bits will be transferred without errors. It is then the responsibility of the error control algorithm to detect those errors and in some cases correct them so that upper layers will receive error free data. The polynomial code, also known as Cyclic Redundancy Code (CRC) is a very powerful and easily implemented technique to obtain data reliability. As data transfer rates and the amount of data stored increase, the need for simple and robust error detection codes should increase as well. Thus, it is important to be sure that the CRCs in use are as effective as possible. Unfortunately, standardized CRC polynomials such as the CRC-32 polynomial used in the Ethernet network standard are known to be grossly suboptimal for important applications, (Koopman, 2002). This research investigates the effectiveness of error detection methods in data transmission used several years ago when we had to do with small amount of data transfer and data storages compared with the huge amount of data we deal with nowadays.  A demonstration of erroneous bits in data frames that may not be detected by the CRC method will be shown. A corrective method to detect errors when dealing with humongous data transmission will also be given.


2011 ◽  
Vol 20 (08) ◽  
pp. 1505-1527 ◽  
Author(s):  
ZORAN STAMENKOVIĆ

The paper emphasizes methods, architectures, and components for system-on-chip design. It describes the basic knowledge and skills for designing high-performance low-power embedded devices whose complexity increases exponentially, as so does the effort of designing them. Relying upon an appropriate design methodology which concentrates on reuse, executable specifications, and early error detection, these complexities can be mastered. The paper bundles these topics in order to provide a good understanding of all the problems involved. It shows how to go from description and verification to implementation and testing, presenting three systems-on-chip for three different wireless applications based on configurable processors and custom hardware accelerators.


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