Noise Reduction via Chopper Stabilization of Fully Differential Temperature Sensors for Hardware Security Applications

A fully differential multipath current-feedback instrumentation amplifier (CFIA) for a resistive bridge sensor readout integrated circuit (IC) is proposed. To reduce the CFIA’s own offset and 1/f noise, a chopper stabilization technique is implemented. To attenuate the output ripple caused by chopper up-modulation, a ripple reduction loop (RRL) is employed. A multipath architecture is implemented to compensate for the notch in the chopping frequency band of the transfer function. To prevent performance degradation resulting from external offset, a 12-bit R-2R digital-to-analog converter (DAC) is employed. The proposed CFIA has an adjustable gain of 16–44 dB with 5-bit programmable resistors. The proposed resistive sensor readout IC is implemented in a 0.18 μm complementary metal-oxide-semiconductor (CMOS) process. The CFIA draws 169 μA currents from a 3.3 V supply. The simulated input-referred noise and noise efficiency factor (NEF) are 28.3 nV/√Hz and 14.2, respectively. The simulated common-mode rejection ratio (CMRR) is 162 dB, and the power supply rejection ratio (PSRR) is 112 dB.

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A 0.6V Supply CMOS Amplifier Using Noise Reduction Technique of Autozeroing and Chopper Stabilization

10.7567/ssdm.2006.i-6-2 ◽

2006 ◽

Author(s):

Yoshihiro Masui ◽

Takeshi Yoshida ◽

Mamoru Sasaki ◽

Atsushi Iwata

Keyword(s):

Noise Reduction ◽

Reduction Technique ◽

Chopper Stabilization ◽

Cmos Amplifier ◽

Noise Reduction Technique

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Design of High-SNR CMOS Interface Circuit for Micro-Machined Gyroscope

Key Engineering Materials ◽

10.4028/www.scientific.net/kem.483.508 ◽

2011 ◽

Vol 483 ◽

pp. 508-512

Author(s):

Hai Xi Lu ◽

Yong Ping Xu ◽

Shou Rong Wang

Keyword(s):

High Gain ◽

Low Noise ◽

Sigma Delta Modulator ◽

Sigma Delta ◽

Interface Circuit ◽

Fully Differential ◽

Chopper Stabilization ◽

Front End ◽

Cascade Structure ◽

Stabilization Technique

A CMOS integrated interface circuit for micro-machined gyroscope containing a novel front-end and 6th-order Sigma-delta modulator is presented in this paper. To reduce the noise coming from the sensor and circuit, the front-end is accomplished by a switched-capacitor architecture, which constructed by a high-gain fully-differential amplifier and improved by chopper-stabilization technique, and work under a designed charging and sampling logic scheme. A cascade 6th-order Sigma-Delta modulator is designed to get high resolution, reduce quantized error and suppress the instability brought by high-order modulator. With the cascade structure and 16-bit resolution 32 OSR, the modulator outputs 3-bits digital stream. The whole circuit is designed with AMS technique and 3.3V power consumption. The simulation result presents that the interface circuit performs a appointed under a low-noise design specification in signal band, and the SNR of the circuit achieves remarkable value of 106dB.

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