scholarly journals Three phase VSI with reduced output voltage distortion using FPGA based multisampled space vector modulation

Author(s):  
Alexander L. Julian ◽  
Giovanna Oriti
Author(s):  
Izni Mustafar ◽  
Naziha A. Azli ◽  
Norjulia M. Nordin

A Quasi Z-Source (qZS) network has been utilized in a B4 inverter topology to provide voltage boosting effect by turning on the upper and lower switches simultaneously which is known as zero shoot-through states. However, the design of a qZS B4 inverter is not as straightforward as adding a qZS LC impedance network to the front-end of a B4 inverter. This is because there is no zero vectors available in a B4 inverter topology to insert the shoot through zero states, as in the case of a B6 inverter. This paper proposes a new Space Vector Modulation (SVM) technique for a qZS B4 inverter. Additional zero vectors have been appropriately added and distributed in the proposed SVM to avoid altering the existing volt-sec per switching cycle for the existing active vectors. The voltage vectors switching placement is carefully designed in order to enable the voltage boosting effect for this topology without altering the initial output voltage. In addition, an approach to compensate the DC-link voltage ripple has also been taken into consideration in its initial calculation to achieve balanced output voltage. The performance of the proposed modulation technique is verified using MATLAB/Simulink. It is shown that by using the proposed modulation technique, there is an overall improvement on the line to line output voltage where by it is able to produce balanced output voltages for the three-phase loads with or without boosting effect.


Author(s):  
R. Palanisamy ◽  
A. Velu ◽  
K. Selvakumar ◽  
D. Karthikeyan ◽  
D. Selvabharathi ◽  
...  

This paper deals the implementation of 3-level output voltage using dual 2-level inverter with control of sub-region based Space Vector Modulation (SR-SVM). Switching loss and voltage stress are the most important issues in multilevel inverters, for keep away from these problems dual inverter system executed. Using this proposed system, the conventional 3-level inverter voltage vectors and switching vectors can be located. In neutral point clamped multilevel inverter, it carries more load current fluctuations due to the DC link capacitors and it requires large capacitors. Based on the sub-region SVM used to control IGBT switches placed in the dual inverter system. The proposed system improves the output voltage with reduced harmonic content with improved dc voltage utilisation. The simulation and hardware results are verified using matlab/simulink and dsPIC microcontroller.


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