Phase Control using Network Node Voltage Feedback for Capacitor-Coupled Dual Active Bridge DC-DC Converters

Author(s):  
Sunghyuk Choi ◽  
Jin-Su Hong ◽  
Jung-Ik Ha
2011 ◽  
Vol 131 (6) ◽  
pp. 811-819
Author(s):  
Michio Tamate ◽  
Akio Toba ◽  
Yasushi Matsumoto ◽  
Keiji Wada ◽  
Toshihisa Shimizu

2020 ◽  
Vol 140 (3) ◽  
pp. 175-183
Author(s):  
Kengo Kawauchi ◽  
Hayato Higa ◽  
Hiroki Watanabe ◽  
Keisuke Kusaka ◽  
Jun-ichi Itoh

2011 ◽  
Vol E94-C (10) ◽  
pp. 1634-1640 ◽  
Author(s):  
Daiki TAKEUCHI ◽  
Wataru CHUJO ◽  
Shin-ichi YAMAMOTO ◽  
Yahei KOYAMADA

Author(s):  
Jungil Mok ◽  
Byungki Kang ◽  
Daesun Kim ◽  
Hongsun Hwang ◽  
Sangjae Rhee ◽  
...  

Abstract Systematic retention failure related on the adjacent electrostatic potential is studied with sub 20nm DRAM. Unlike traditional retention failures which are caused by gate induced drain leakage or junction leakage, this failure is influenced by the combination of adjacent signal line and adjacent contact node voltage. As the critical dimension between adjacent active and the adjacent signal line and contact node is scaled down, the effect of electric field caused by adjacent node on storage node is increased gradually. In this paper, we will show that the relationship between the combination electric field of adjacent nodes and the data retention characteristics and we will demonstrate the mechanism based on the electrical analysis and 3D TCAD simulation simultaneously.


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