Subthreshold Swing in Silicon Gate-All-Around Nanowire MOSFET at Cryogenic Temperature

The Ti-6 wt.% Al-4 wt.% V commercial alloys have exhibited an improved formability at cryogenic temperature when the alloys were heat-treated prior to the tests. The author was interested in further investigating this unusual ductile behavior which may be associated with the strain-induced transformation or twinning of the a phase, enhanced at lower temperatures. The starting materials, supplied by RMI Co., Niles, Ohio were rolled mill products in the form of 40 mil sheets. The microstructure of the as-received materials contained mainly ellipsoidal α grains measuring between 1 and 5μ. The β phase formed an undefined grain boundary around the a grains. The specimens were homogenized at 1050°C for one hour, followed by aging at 500°C for two hours, and then quenched in water to produce the α/β mixed microstructure.

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A novel process for SiGe Core-Shell JAM Transistors Fabrication and thermal annealing effect on its electrical performance

Semiconductor Science and Information Devices ◽

10.30564/ssid.v1i2.1399 ◽

2020 ◽

Vol 1 (2) ◽

Author(s):

Ashish Kumar ◽

Wen-Hsi Lee

Keyword(s):

Process Condition ◽

Subthreshold Swing ◽

Electrical Performance ◽

Core Shell ◽

Electrical Characteristics ◽

Thermal Budget ◽

New Process ◽

Comparable Performance ◽

Higher Temperature ◽

Film Annealing

In this study, we fabricate Si/SiGe core-shell Junctionless accumulation mode (JAM)FinFET devices through a rapid and novel process with four main steps, i.e. e-beam lithography definition, sputter deposition, alloy combination annealing, and chemical solution etching. The height of Si core is 30 nm and the thickness of Si/SiGe core-shell is about 2 nm. After finishing the fabrication of devices, we widely studied the electrical characteristics of poly Si/SiGe core-shell JAM FinFET transistors from a view of different Lg and Wch. A poly-Si/SiGe core -shell JAMFETs was successfully demonstrated and it also exhibits a superior subthreshold swing of 81mV/dec and high on/off ratio > 105 when annealing for 1hr at 600°C. The thermal diffusion process condition for this study are 1hr at 600°C and 6hr at 700°C for comparison. The annealing condition at 700oC for 6 hours shows undesired electrical characteristics against the other. Results suggests that from over thermal budget causes a plenty of Ge to precipitate against to form SiGe thin film. Annealing JAMFETs at low temperature shows outstanding Subthreshold swing and better swing condition when compared to its counterpart i.e. at higher temperature. This new process can still fabricate a comparable performance to classical planar FinFET in driving current.

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