A 8.18 GHz ~12.57 GHz Digitally Controlled Quadrature VCO in 90 nm CMOS Process for X Band Applications

Author(s):  
Fahim Shariar ◽  
Rebina Akter ◽  
Md. Ariful Islam ◽  
Md. Sohel Rana ◽  
Omar Faruqe ◽  
...  
Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2198
Author(s):  
Zhichao Li ◽  
Shiheng Yang ◽  
Samuel B. S. Lee ◽  
Kiat Seng Yeo

For higher integration density, X-band power amplifiers (PAs) with CMOS technology have been widely discussed in recent publications. However, with reduced power supply voltage and device size, it is a great challenge to design a compact PA with high output power and power-added efficiency (PAE). In the proposed design, a 40-nm standard CMOS process is used for higher integration with other RF building blocks, compared with other CMOS PA designs with larger process node. Transistor cells are designed with neutralization capacitors to increase stability and gain performance of the PA. As a trade-off among gain, output power, and PAE, the transistor cells in driving stage and power stage are biased for class A and class AB operation, respectively. Both transistor cells consist of two transistors working in differential mode. Furthermore, transformer-based matching networks (TMNs) are used to realize a two-stage X-band CMOS PA with compact size. The PA achieves an effective conductivity (EC) of 117.5, which is among the highest in recently reported X-band PAs in CMOS technology. The PA also attains a saturated output power (Psat) of 20.7 dBm, a peak PAE of 22.4%, and a gain of 25.6 dB at the center frequency of 10 GHz under a 1 V supply in 40-nm CMOS.


2015 ◽  
Vol 36 (6) ◽  
pp. 065004 ◽  
Author(s):  
Liang Chen ◽  
Xinyu Chen ◽  
Youtao Zhang ◽  
Zhiqun Li ◽  
Lei Yang

2005 ◽  
Vol 40 (11) ◽  
pp. 2203-2211 ◽  
Author(s):  
R.B. Staszewski ◽  
Chih-Ming Hung ◽  
N. Barton ◽  
Meng-Chang Lee ◽  
D. Leipold

2005 ◽  
Vol 44 (4) ◽  
pp. 305-307
Author(s):  
Sangsoo Ko ◽  
Taeksang Song ◽  
Euisik Yoon ◽  
Songcheol Hong
Keyword(s):  
X Band ◽  

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