A digitally controlled linear voltage regulator in a 65nm CMOS process

Author(s):  
Thomas Jackum ◽  
Gerhard Maderbacher ◽  
Wolfgang Pribyl ◽  
Roman Riederer
2016 ◽  
Vol 2016 (HiTEC) ◽  
pp. 000106-000111 ◽  
Author(s):  
R.C. Murphree ◽  
S. Ahmed ◽  
M. Barlow ◽  
A. Rahman ◽  
H.A. Mantooth ◽  
...  

Abstract This paper establishes the first linear regulator in a 1.2 μm CMOS silicon carbide (SiC) process. The linear regulator presented consists of a SiC error amplifier and a pass transistor which has a W/L = 70,000 μm / 1.2 μm. The feedback loop is internal and the frequency compensation network is a combination of internal and external components. As a result of potential process variation in this emerging technology, the voltage reference used at the negative input terminal of the error amplifier has been made external. With an input voltage of 20 V to 30 V, the voltage regulator is able to provide a 15 V output and a continuous load current of 100 mA at temperatures ranging from 25 °C to over 400 °C. At a temperature of 400 °C, testing of the fabricated circuit has shown line regulation of less than 4 mV/V. Under the same test conditions, a load regulation of less than 420 mV/A is achieved.


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