Cyclic Combinational Gate diffusion input (CCGDI) technique- a new approach of low power digital combinational circuit design

2015 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT) ◽

10.1109/icecct.2015.7226150 ◽

2015 ◽

Author(s):

Biswarup Mukherjee ◽

Biplab Roy ◽

Arindam Biswas ◽

Aniruddha Ghosal

Keyword(s):

Low Power ◽

Circuit Design ◽

Combinational Circuit ◽

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A novel reversible combinational circuit design for low power computation

2015 IEEE Power, Communication and Information Technology Conference (PCITC) ◽

10.1109/pcitc.2015.7438189 ◽

2015 ◽

Author(s):

Rakhi Saha ◽

Sambita Dalal

Keyword(s):

Low Power ◽

Circuit Design ◽

Combinational Circuit

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Tunable Delay Element for Low Power VLSI Circuit Design

TENCON 2006 - 2006 IEEE Region 10 Conference ◽

10.1109/tencon.2006.344092 ◽

2006 ◽

Author(s):

Jung-Lin Yang ◽

Chih-Wei Chao ◽

Sung-Min Lin

Keyword(s):

Low Power ◽

Circuit Design ◽

Vlsi Circuit ◽

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Double-gate fully-depleted SOI transistors for low-power high-performance nano-scale circuit design

ISLPED'01: Proceedings of the 2001 International Symposium on Low Power Electronics and Design (IEEE Cat. No.01TH8581) ◽

10.1145/383082.383136 ◽

2001 ◽

Author(s):

Rongtian Zhang ◽

Kaushik Roy ◽

David Janes

Keyword(s):

Low Power ◽

Circuit Design ◽

High Performance ◽

Double Gate ◽

Fully Depleted ◽

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Stacked keeper with body bias: A new approach to reduce leakage power for low power VLSI design

2014 IEEE International Conference on Advanced Communications, Control and Computing Technologies ◽

10.1109/icaccct.2014.7019482 ◽

2014 ◽

Author(s):

K. N. Bhargav ◽

A. Suresh ◽

Gaurav Saini

Keyword(s):

Low Power ◽

Vlsi Design ◽

Leakage Power ◽

New Approach ◽

Low Power Vlsi Design ◽

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Low power supply BiCMOS SRAM circuit design issues

[1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems ◽

10.1109/mwscas.1992.271258 ◽

2003 ◽

Author(s):

H. van Tran

Keyword(s):

Low Power ◽

Circuit Design ◽

Power Supply ◽

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Low-power analog/RF circuit design based on the inversion coefficient

ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC) ◽

10.1109/esscirc.2015.7313863 ◽

2015 ◽

Author(s):

Christian Enz ◽

Maria-Anna Chalkiadaki ◽

Anurag Mangla

Keyword(s):

Low Power ◽

Circuit Design ◽

Inversion Coefficient ◽

Rf Circuit Design ◽

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New Data Encoding Method with a Multi-Value Logic for Low Power Asynchronous Circuit Design

36th International Symposium on Multiple-Valued Logic (ISMVL'06) ◽

10.1109/ismvl.2006.30 ◽

2006 ◽

Author(s):

Eun-Ju Choi ◽

Kyoung-Rok Cho ◽

Je-Hoon Lee

Keyword(s):

Low Power ◽

Circuit Design ◽

Asynchronous Circuit ◽

Data Encoding ◽

Encoding Method ◽

Asynchronous Circuit Design

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A CMOS combinational circuit-design method using mixed logic concepts

IEEE Transactions on Education ◽

10.1109/13.406505 ◽

1995 ◽

Vol 38 (3) ◽

pp. 266-273 ◽

Author(s):

W.B. Hudson ◽

J.S. Beasley ◽

J.E. Steelman

Keyword(s):

Circuit Design ◽

Design Method ◽

Combinational Circuit

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TTCN: A new approach for low-power split-row LDPC decoders

2015 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2015.7169068 ◽

2015 ◽

Author(s):

Mohammad Shahrad ◽

Mahdi Shabany

Keyword(s):

Low Power ◽

New Approach ◽

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Some aspects of an evolvable hardware approach for multiple-valued combinational circuit design

Evolvable Systems: From Biology to Hardware - Lecture Notes in Computer Science ◽

10.1007/bfb0057609 ◽

1998 ◽

pp. 78-89 ◽

Author(s):

Tatiana Kalganova ◽

Julian F. Miller ◽

Terence C. Fogarty

Keyword(s):

Circuit Design ◽

Evolvable Hardware ◽

Combinational Circuit

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