Study on high-speed synthesis method of polarization images in the small moving target detection system

Author(s):  
Li Zhiyong ◽  
Ye Zhenliang ◽  
Teng Minggui
2019 ◽  
Vol 2019 (20) ◽  
pp. 6637-6641
Author(s):  
Jinquan Zhang ◽  
Jingwen Li ◽  
Haizhong Ma ◽  
Ye Wang

Sensors ◽  
2020 ◽  
Vol 20 (8) ◽  
pp. 2204 ◽  
Author(s):  
Yang Yu ◽  
Bo Liu ◽  
Zhen Chen ◽  
ZhiKang Li

A macro-pulse photon counting Lidar is described in this paper, which was designed to implement long-range and high-speed moving target detection. The ToF extraction method for the macro-pulse photon counting Lidar system is proposed. The performance of the macro pulse method and the traditional pulse accumulation method were compared in theory and simulation experiments. The results showed that the performance of the macro-pulse method was obviously better than that of the pulse accumulation method. At the same time, a laboratory verification platform for long range and high-speed moving targets was built. The experimental results were highly consistent with the theoretical and simulation results. This proved that the macro pulse photon counting Lidar is an effective method to measure long range high-speed moving targets.


2016 ◽  
Vol 2016 ◽  
pp. 1-16 ◽  
Author(s):  
Jia Wei Tang ◽  
Nasir Shaikh-Husin ◽  
Usman Ullah Sheikh ◽  
M. N. Marsono

Moving target detection is the most common task for Unmanned Aerial Vehicle (UAV) to find and track object of interest from a bird’s eye view in mobile aerial surveillance for civilian applications such as search and rescue operation. The complex detection algorithm can be implemented in a real-time embedded system using Field Programmable Gate Array (FPGA). This paper presents the development of real-time moving target detection System-on-Chip (SoC) using FPGA for deployment on a UAV. The detection algorithm utilizes area-based image registration technique which includes motion estimation and object segmentation processes. The moving target detection system has been prototyped on a low-cost Terasic DE2-115 board mounted with TRDB-D5M camera. The system consists of Nios II processor and stream-oriented dedicated hardware accelerators running at 100 MHz clock rate, achieving 30-frame per second processing speed for 640 × 480 pixels’ resolution greyscale videos.


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