Structural and electrical characteristics of Al-doped TiO2 high-k gate dielectric grown by atomic layer deposition

Author(s):  
Zhang-Yi Xie ◽  
Yang Geng ◽  
Zhi-Yuan Ye ◽  
Qing-Qing Sun ◽  
Peng-Fei Wang ◽  
...  
2019 ◽  
Vol 16 (4) ◽  
pp. 291-305 ◽  
Author(s):  
Robert D. Clark ◽  
Steve Consiglio ◽  
Cory Wajda ◽  
Gert Leusink ◽  
Takuya Sugawara ◽  
...  

2013 ◽  
Vol 109 ◽  
pp. 64-67 ◽  
Author(s):  
Chen-Chien Li ◽  
Kuei-Shu Chang-Liao ◽  
Chung-Hao Fu ◽  
Tsung-Lin Hsieh ◽  
Li-Ting Chen ◽  
...  

2015 ◽  
Vol 15 (1) ◽  
pp. 382-385
Author(s):  
Jun Hee Cho ◽  
Sang-Ick Lee ◽  
Jong Hyun Kim ◽  
Sang Jun Yim ◽  
Hyung Soo Shin ◽  
...  

2018 ◽  
Vol 924 ◽  
pp. 490-493 ◽  
Author(s):  
Muhammad I. Idris ◽  
Nick G. Wright ◽  
Alton B. Horsfall

3-Dimensional 4H-SiC metal-oxide-semiconductor capacitors have been fabricated to determine the effect of the sidewall on the characteristics of 3-Dimentional gate structures. Al2O3 deposited by Atomic Layer Deposition (ALD) was used as the gate dielectric layer on the trench structure. The 3-D MOS capacitors exhibit increasing accumulation capacitance with excellent linearity as the sidewall area increases, indicating that ALD results in a highly conformal dielectric film. The capacitance – voltage characteristics also show evidence of a second flatband voltage, located at a higher bias than that seen for purely planar devices on the same sample. We also observe that the oxide capacitance of planar and 3-D MOS capacitors increases with temperature. Finally, we have found that the 3-D MOS capacitor has a weaker temperature dependence of flatband voltage in comparison to the conventional planar MOS capacitor due to the incorporation of the (1120) plane in the sidewall.


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