Abstract
High pressure annealing technique at 6 atm over a wide range of temperature (200-450˚C) was introduced as post metal annealing on high-k/metal gate metal-oxide-semiconductor capacitor. To verify the ability of HPA in improving interface trap density, leakage issue the other MOS capacitor with same structure was annealed by MWA for comparison. The electrical performance of the capacitors under different etching mechanism was analyzed and the difference in characteristics such as flat-band voltage shift, oxide trapped charge, interface state density and leakage current were compared. The results show that high pressure annealing process is more effective to minimize the oxide trapped charged at low temperature than by high power MWA at 3000W, and the reduction in leakage current density after high pressure anneal at low temperature corresponds to the reduction in charge traps. High pressure annealing demonstrates great potential as the post-metallization annealing process for the high-k/metal gate structure .