A Novel Area-Efficient Fast CORDIC for Energy-efficient Adaptive Exponential Integrate and Fire Neuron Design

2021 ◽  
Author(s):  
Yujie Li ◽  
Guangyou Hong ◽  
Zixuan Peng ◽  
Jipeng Wang ◽  
Jiarui Xu ◽  
...  
Keyword(s):  
Energy Efficient ◽  
Integrate And Fire ◽  
Integrate And Fire Neuron ◽  
Area Efficient

scholarly journals Compact and Energy Efficient Neuron With Tunable Spiking Frequency in 22-nm FDSOI

2021 ◽  
Author(s):  
Hossein Eslahi ◽  
Tara Hamilton ◽  
Sourabh Khandelwal
Keyword(s):  
Energy Efficient ◽  
Low Energy ◽  
Threshold Region ◽  
Back Gate ◽  
Neuron Circuit ◽  
Integrate And Fire ◽  
Layout Area ◽  
First Time ◽  
Novel Design ◽  
Integrate And Fire Neuron

In this paper, we present a mixed-signal integrate and fire neuron designed in a 22-nm FDSOI technology. In this novel design, we deploy the back-gate terminal of FDSOI technology for a tunable design. For the first time, we show analytically and with pre- and post-layout simulations a neuron with tunable spiking frequency using the back-gate voltage of FDSOI technology. The neuron circuit is designed in the sub-threshold region and dissipates an ultra-low energy per spike of the order of Femto Joules per spike. With the layout area of only 30um^2, this is the smallest neuron circuit reported to date.

scholarly journals Compact and Energy Efficient Neuron With Tunable Spiking Frequency in 22-nm FDSOI

2021 ◽  
Author(s):  
Hossein Eslahi ◽  
Tara Hamilton ◽  
Sourabh Khandelwal
Keyword(s):  
Energy Efficient ◽  
Low Energy ◽  
Threshold Region ◽  
Back Gate ◽  
Neuron Circuit ◽  
Integrate And Fire ◽  
Layout Area ◽  
First Time ◽  
Novel Design ◽  
Integrate And Fire Neuron

In this paper, we present a mixed-signal integrate and fire neuron designed in a 22-nm FDSOI technology. In this novel design, we deploy the back-gate terminal of FDSOI technology for a tunable design. For the first time, we show analytically and with pre- and post-layout simulations a neuron with tunable spiking frequency using the back-gate voltage of FDSOI technology. The neuron circuit is designed in the sub-threshold region and dissipates an ultra-low energy per spike of the order of Femto Joules per spike. With the layout area of only 30um^2, this is the smallest neuron circuit reported to date.

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