Compact and Energy Efficient Neuron With Tunable Spiking Frequency in 22-nm FDSOI

In this paper, we present a mixed-signal integrate and fire neuron designed in a 22-nm FDSOI technology. In this novel design, we deploy the back-gate terminal of FDSOI technology for a tunable design. For the first time, we show analytically and with pre- and post-layout simulations a neuron with tunable spiking frequency using the back-gate voltage of FDSOI technology. The neuron circuit is designed in the sub-threshold region and dissipates an ultra-low energy per spike of the order of Femto Joules per spike. With the layout area of only 30um^2, this is the smallest neuron circuit reported to date.

Compact and Energy Efficient Neuron With Tunable Spiking Frequency in 22-nm FDSOI

In this paper, we present a mixed-signal integrate and fire neuron designed in a 22-nm FDSOI technology. In this novel design, we deploy the back-gate terminal of FDSOI technology for a tunable design. For the first time, we show analytically and with pre- and post-layout simulations a neuron with tunable spiking frequency using the back-gate voltage of FDSOI technology. The neuron circuit is designed in the sub-threshold region and dissipates an ultra-low energy per spike of the order of Femto Joules per spike. With the layout area of only 30um^2, this is the smallest neuron circuit reported to date.

Any neuron can perform linearly non-separable computations

Multiple studies have shown how dendrites enable some neurons to perform linearly non-separable computations. These works focus on cells with an extended dendritic arbor where voltage can vary independently, turning dendritic branches into local non-linear subunits. However, these studies leave a large fraction of the nervous system unexplored. Many neurons, e.g. granule cells, have modest dendritic trees and are electrically compact. It is impossible to decompose them into multiple independent subunits. Here, we upgraded the integrate and fire neuron to account for saturating dendrites. This artificial neuron has a unique membrane voltage and can be seen as a single layer. We present a class of linearly non-separable computations and how our neuron can perform them. We thus demonstrate that even a single layer neuron with dendrites has more computational capacity than without. Because any neuron has one or more layer, and all dendrites do saturate, we show that any dendrited neuron can implement linearly non-separable computations.

Any neuron can perform linearly non-separable computations

Multiple studies have shown how dendrites enable some neurons to perform linearly non-separable computations. These works focus on cells with an extended dendritic arbor where voltage can vary independently, turning dendritic branches into local non-linear subunits. However, these studies leave a large fraction of the nervous system unexplored. Many neurons, e.g. granule cells, have modest dendritic trees and are electrically compact. It is impossible to decompose them into multiple independent subunits. Here, we upgraded the integrate and fire neuron to account for saturating dendrites. This artificial neuron has a unique membrane voltage and can be seen as a single layer. We present a class of linearly non-separable computations and how our neuron can perform them. We thus demonstrate that even a single layer neuron with dendrites has more computational capacity than without. Because any neuron has one or more layer, and all dendrites do saturate, we show that any dendrited neuron can implement linearly non-separable computations.

Frequency Selectivity of Neural Circuits with Heterogeneous Discrete Transmission Delays

Neurons are connected to other neurons by axons and dendrites that conduct signals with finite velocities, resulting in delays between the firing of a neuron and the arrival of the resultant impulse at other neurons. Since delays greatly complicate the analytical treatment and interpretation of models, they are usually neglected or taken to be uniform, leading to a lack in the comprehension of the effects of delays in neural systems. This letter shows that heterogeneous transmission delays make small groups of neurons respond selectively to inputs with differing frequency spectra. By studying a single integrate-and-fire neuron receiving correlated time-shifted inputs, it is shown how the frequency response is linked to both the strengths and delay times of the afferent connections. The results show that incorporating delays alters the functioning of neural networks, and changes the effect that neural connections and synaptic strengths have.

Integrate-and-Fire Neuron Circuit Without External Bias Voltages

In this study, we propose an integrate-and-fire (I&F) neuron circuit using a p-n-p-n diode that utilizes a latch-up phenomenon and investigate the I&F operation without external bias voltages using mixed-mode technology computer-aided design (TCAD) simulations. The neuron circuit composed of one p-n-p-n diode, three MOSFETs, and a capacitor operates with no external bias lines, and its I&F operation has an energy consumption of 0.59 fJ with an energy efficiency of 96.3% per spike. The presented neuron circuit is superior in terms of structural simplicity, number of external bias lines, and energy efficiency in comparison with that constructed with only MOSFETs. Moreover, the neuron circuit exhibits the features of controlling the firing frequency through the amplitude and time width of the synaptic pulse despite of the reduced number of the components and no external bias lines.

HARDWARE IMPLEMENTATION DESIGN OF A SPIKING NEURON

The hardware implementation of an artificial neuron is the key problem of the design of neuromorphic chips which are new promising architectural solutions for massively parallel computing. In this paper an analog neuron circuit design is presented to be used as a building element of spiking neuron networks. The design of the neuron is performed at the transistor level based on Leaky Integrate-and-Fire neuron implementation model. The neuron is simulated using EDA tool to verify the design. Signal waveforms at key nodes of the neuron are obtained and neuron functionality is demonstrated.