Event-driven, continuous-time ADCs and DSPs for adapting power dissipation to signal activity

2010 ◽  
Author(s):  
Yannis Tsividis
Keyword(s):  
Continuous Time ◽  
Power Dissipation ◽  
Event Driven ◽  
Signal Activity

scholarly journals Event-driven optimization-based control of hybrid systems with integral continuous-time dynamics

Automatica ◽  
2009 ◽  
Vol 45 (5) ◽  
pp. 1243-1251 ◽  
Author(s):  
S. Di Cairano ◽  
A. Bemporad ◽  
J. Júlvez
Keyword(s):  
Hybrid Systems ◽  
Continuous Time ◽  
Time Dynamics ◽  
Event Driven

scholarly journals A High Speed Latched Circuit for Flash ADC

2019 ◽  
Vol 8 (12) ◽  
pp. 3741-3745
Keyword(s):  
Integrated Circuit ◽  
Continuous Time ◽  
Power Dissipation ◽  
High Speed ◽  
Digital Signal ◽  
Time Varying ◽  
Slew Rate ◽  
Digital Signals ◽  
Flash Adc ◽  
Offset Voltage

Practically all electronic systems are realized using integrated circuit(IC) chips. The IC design requires digital signals, but however the physical signals available routinely are either continuous time varying signals or corrupted discrete voltages. These continuous time varying input signals are converted to full voltage swing digital signals by means of a comparator circuit. The comparators use regenerative feedback to transform the output to a full scale digital signal. The core specifications considered in this comparator implementation are power dissipation (PD), propagation delay (tP), output offset voltage and slew rate. The circuit is simulated in CMOS 180nm technology using Tanner EDA tool. The high speed latched comparator circuit is powered with a 1.8V DC power supply and the obtained results show that it operates at 1.67GHz, slew rate is 126 V/µS and the dynamic power dissipation is found to be 0.328mW.

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