Pseudo differential operational transconductance amplifier using common mode feed forward and HD3 feed forward

Author(s):  
Yen-Shuo Chang ◽  
Hong-Chong Wu ◽  
Miin-Shyue Shiau ◽  
Don-Gey Liu ◽  
Heng-shou Hsu
Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1457 ◽  
Author(s):  
Xiang Li ◽  
Bo Hou ◽  
Chunge Ju ◽  
Qi Wei ◽  
Bin Zhou ◽  
...  

An improved operational transconductance amplifier (OTA) is presented in this work. The fully differential OTA adopts the current recycling technique and complementary NMOS and PMOS input branches to enhance the total transconductance. Moreover, in order to achieve higher current efficiency, a data-driven biasing circuit was developed to dynamically adjust the power consumption of the amplifier. Two comparators were added to detect the voltage difference at the input nodes, and when the differential input is large enough to activate either comparator, extra biasing current is activated and poured into the amplifier to enhance its slew rate and gain-bandwidth product (GBW). The threshold voltage of the complementary recycling folded cascode (CRFC)-based comparator is configured to suppress overshoot. Complementary common-mode feedback (CMFB) topology with local CMFB structure is built to acquire high common-mode gain. The OTA was fabricated in SMIC 0.18- μ m CMOS technology. The experimental result based on a capacitive feedback loop shows that the data-driven operation improves the average slew rate of the amplifier from 10.2 V/ μ s to 55.5 V/ μ s while the power only increases by 150%. The OTA has good potential to satisfy the fast settling demands for capacitive sensing circuits.


This paper presents a 4th-order incremental deltasigma ADC for CMOS image sensors. The ADC employing a cascade of integrators with feed forward (CIFF) architecture uses only one operational transconductance amplifier (OTA) by sharing the OTA between 1st and 2nd stages of the modulator. by using a proposed self-biasing amplifier ,which allows active signal summation at the quantizer input node without using an additional OTA, thus power and area savings are achieved. Fabricated in 90nm technology, the 4th orderdsm consumes 32.5 µW from a 1.2V supply.


Author(s):  
Vasudeva Gowdagere ◽  
Uma Bidikinamane Venkataramanaiah

<p><span>Fin field-effect transistor (FinFET) based analog circuits are gaining importance over metal oxide semiconductor field effect transistor (MOSFET) based circuits with stability and high frequency operations. Comparator that forms the sub block of most of the analog circuits is designed using operational transconductance amplifier (OTA). The OTA is designed using new design procedures and the comparator circuit is designed integrating the sub circuits with OTA. The building blocks of the comparator design such as input level shifter, differential pair with cascode stage and class AB amplifier for output swing are designed and integrated. Folded cascode circuit is used in the feedback path to maintain the common mode input value to a constant, so that the differential pair amplifies the differential signal. The gain of the comparator is achieved to be greater than 100 dB, with phase margin of 65°, common mode rejection ratio (CMRR) of above 70 dB and output swing from rail to rail. The circuit provides unity gain bandwidth of 5 GHz and is suitable for high sampling rate data converter circuits.</span></p>


Sign in / Sign up

Export Citation Format

Share Document