High-gain DR circular patch on-chip antenna based on standard CMOS technology for millimeter-wave applications

Author(s):  
Yu-Bo Wang ◽  
Jia-Qi Liu ◽  
Joshua Le-Wei Li ◽  
Albert Chin

2013 ◽  
Vol 2013 ◽  
pp. 1-5 ◽  
Author(s):  
Guo Qing Luo ◽  
Zheng Zheng Song ◽  
Xiao Hong Zhang ◽  
Xiao Ping Hu

An artificial magnetic conductor (AMC) applied in millimeter wave on chip antenna design based on a standard 0.18 μm CMOS technology is studied. The AMC consisting of two-dimensional periodic dogbone shape elements is constructed at one metal layer of the CMOS structure. After its performance has been completely investigated, it has been used in an on chip dipole antenna design as an artificial background to enhance efficiency of the dipole antenna. The result shows that 0.72 dB gain has been achieved at 75 GHz when the AMC is constructed by a 4*6 dogbone array.



2021 ◽  
Vol 35 (11) ◽  
pp. 1380-1381
Author(s):  
Milad Moosavifar ◽  
David Wentzloff

This paper presents high gain and compact Transmit/Receive (TX/RX) integrated antennas in a standard BiCMOS 130nm technology for millimeter-scale millimeter-wave (mm-wave) applications, including high data rate radios and high resolution radars. The proposed TX/RX antenna module utilizes an integrated dipole antenna for the receiver and a slot antenna for the transmitter, placed orthogonally. The achieved gain and radiation efficiency are 5.7dBi and 41.3% for the slot antenna, respectively, and 6dBi and 39% for the dipole antenna. The link budget is improved by 16dB by optimization on the geometry as well as application of a high resistivity hemispheric silicon dielectric lens.



Author(s):  
Philipp Ritter

Abstract Next-generation automotive radar sensors are increasingly becoming sensitive to cost and size, which will leverage monolithically integrated radar system-on-Chips (SoC). This article discusses the challenges and the opportunities of the integration of the millimeter-wave frontend along with the digital backend. A 76–81 GHz radar SoC is presented as an evaluation vehicle for an automotive, fully depleted silicon-over-insulator 22 nm CMOS technology. It features a digitally controlled oscillator, 2-millimeter-wave transmit channels and receive channels, an analog base-band with analog-to-digital conversion as well as a digital signal processing unit with on-chip memory. The radar SoC evaluation chip is packaged and flip-chip mounted to a high frequency printed circuit board for functional demonstration and performance evaluation.







Author(s):  
Xin Lv ◽  
Zheng Zhi Ding ◽  
Jia Ming Yang ◽  
Da Sheng Cui
Keyword(s):  


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