In this paper, we design a THz CMOS on-chip patch antenna with defected ground structure (DGS) and utilize it to implement a broadband and high gain on-chip antenna array. It is verified from the simulation that the DGS not only can increase the gain and bandwidth of the antenna element, but also can increase the isolation between the antenna elements in the on-chip array. Therefore, it allows the design of the compact 1 × 2 and 2 × 2 on-chip antenna array with high gain and broad bandwidth. The element spacing and feedline structures of the antenna array are designed and optimized by the simulations. The designed antenna element, and 1 × 2 and 2 × 2 antenna arrays are fabricated in a commercial 65 nm CMOS process. In the on-wafer measurement, they exhibit an antenna gain of 3.1 dBi, 7.2 dBi, and 8.2 dBi with a bandwidth of 14.0%, 21.3%, and 28.0% for the reflection coefficient less than −10 dB, respectively, at 300 GHz. This result corresponds to very good performance compared to the reported THz CMOS on-chip antenna array. Therefore, the designed CMOS on-chip antenna element and array using DGS in this work can be effectively applied to build low-cost and high performance THz systems, because they can be fully implemented in a conventional CMOS process without requiring any additional processes or manufacturing techniques.
High-Gain On-Chip Antenna Design on Silicon Layer With Aperture Excitation for Terahertz Applications