Implantable multichannel electrode array based on soi technology

2003 ◽  
Vol 12 (2) ◽  
pp. 179-184 ◽  
Author(s):  
K.C. Cheung ◽  
K. Djupsund ◽  
Y. Dan ◽  
L.P. Lee
1991 ◽  
Vol 105 (2) ◽  
pp. 85-88 ◽  
Author(s):  
R. F. Gray ◽  
R. A. Evans ◽  
C. E. L. Freer ◽  
H. E. Szutowicz ◽  
G. F. Maskell

AbstractOne fifth of patients selected for cochlear implants have such bony irregularities in the cochlear duct that full insertion of a multichannel electrode array is impossible. Three cases of cochlear deafness are presented where pre- and post-operative radiology played an important part in the management.Standard CT at 2 mm cuts is compared with ultra high resolution CT at 1 mm cuts. The pitfall of poor definition is that the inexperienced surgeon may find himself unexpectedly drilling out an obliterated cochlear duct. Sections 30 degrees caudal to Reid's infra orbito-meatal base line at 1 mm intervals give maximum information for minimum radiation.Plain films show the placement of individual platinum electrode contacts in relation to the spiral ‘frequency map’ of the cochlea. This is vital information for the audiologist who has to route specific frequencies to specific sites within the ear for a good hearing result.


1989 ◽  
Vol 98 (6) ◽  
pp. 466-471 ◽  
Author(s):  
Patrick D. van der Puije ◽  
Carlos R. Pon ◽  
Hugh Robillard

This report describes the fabrication of a flexible multichannel electrode array suitable for use in humans. The conductors, pads, and stimulating tips are made of platinum on a polyimide substrate. Photolithographic techniques are employed in the fabrication of the electrode on a planar surface in the form of a film. The film is rolled subsequently into a cylinder of diameter 0.50 mm and the cylinder is filled with medical grade silicone rubber. The stimulation pads then form rings around the cylinder. In vitro and in vivo tests are ongoing with good results so far.


2006 ◽  
Vol 9 (4) ◽  
pp. 263-266 ◽  
Author(s):  
Yasuo Terasawa ◽  
Hiroyuki Tashiro ◽  
Akihiro Uehara ◽  
Tohru Saitoh ◽  
Motoki Ozawa ◽  
...  

2004 ◽  
Vol 243 (2) ◽  
pp. 169-174 ◽  
Author(s):  
Kazuaki Nakauchi ◽  
Takashi Fujikado ◽  
Hiroyuki Kanda ◽  
Takeshi Morimoto ◽  
Jun S. Choi ◽  
...  

2020 ◽  
Vol 63 (11) ◽  
pp. 586-595
Author(s):  
Alexander Korotkov ◽  
Dmitry Morozov ◽  
Mikhail Pilipko ◽  
Mikhail Yenuchenko

Author(s):  
Z. G. Song ◽  
S. K. Loh ◽  
X. H. Zheng ◽  
S.P. Neo ◽  
C. K. Oh

Abstract This article presents two cases to demonstrate the application of focused ion beam (FIB) circuit edit in analysis of memory failure of silicon on insulator (SOI) devices using XTEM and EDX analyses. The first case was a single bit failure of SRAM units manufactured with 90 nm technology in SOI wafer. The second case was the whole column failure with a single bit pass for a SRAM unit. From the results, it was concluded that FIB circuit edit and electrical characterization is a good methodology for further narrowing down the defective location of memory failure, especially for SOI technology, where contact-level passive voltage contrast is not suitable.


Author(s):  
K. Dickson ◽  
G. Lange ◽  
K. Erington ◽  
J. Ybarra

Abstract This paper describes the use of Electron Beam Absorbed Current (EBAC) mapping performed from the back side of the device as a means of locating metallization defects on flip chip 45nm SOI technology.


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