Electrochemical Cell Preparation on MEMS Chip Surface Inside Scanning Electron Microscope

This paper reports the preparation process of an electrochemical cell consisting of metallic lithium, lithium titanate, and ionic liquid on a MEMS chip surface. Firstly, the MEMS chip is described and the connectivity test of the used pads is performed using voltage contrast imaging. Then the process of electrode preparation using the FIB-SEM technique is described in detail. Special attention is paid to lithium, its degradation during transport into the SEM chamber, and the behavior during ion beam cutting. Finally, a complete battery system was built. It was possible to measure charging/discharging of the model battery system, nevertheless, the functionality was affected by the redeposition of conductive materials on the MEMS surface and charging by an electron beam.

Proof of Reverse Engineering Barrier: SEM Image Analysis on Covert Gates

IC camouflaging has been proposed as a promising countermeasure against malicious reverse engineering. Camouflaged gates contain multiple functional device structures, but appear as one single layout under microscope imaging, thereby hiding the real circuit functionality from adversaries. The recent covert gate camouflaging design comes with a significantly reduced overhead cost, allowing numerous camouflaged gates in circuits and thus being resilient against various invasive and semi-invasive attacks. Dummy inputs are used in the design, but SEM imaging analysis was only performed on simplified dummy contact structures in prior work. Whether the e-beam during SEM imaging will charge differently on different contacts and further reveal the different structures or not requires extended research. In this study, we fabricated real and dummy contacts in various structures and performed a systematic SEM imaging analysis to investigate the possible charging and the consequent passive voltage contrast on contacts. In addition, machine-learning based pattern recognition was also employed to examine the possibility of differentiating real and dummy contacts. Based on our experimental results, we found that the difference between real and dummy contacts is insignificant in SEM imaging, which effectively prevents adversarial SEM-based reverse engineering. Index Terms—Reverse Engineering, IC Camouflaging, Scanning Electron Microscopy, Machine Learning, Countermeasure.

A New Delayering Application Workflow in Advanced 5nm Technology Device with Xenon Plasma Focus Ion Beam Microscopy

In semiconductor industry, planer analysis is important in many applications such as Passive Voltage Contrast (PVC) and sample preparation for nanoprobing. In order to achieve successful results on the planer surface analysis, a proper delayering technique is critical. As the thickness of metal line, via of Back-End-of Line (BEOL) and contact layer are getting thinner in advanced nodes, we observed convention hand polishing is facing major challenge in endpointing at exactly targeted layer and specific Region of Interest (ROI). In addition, Cobalt process starting from 5nm node brings additional challenges. Cobalt tends to be oxidized easily which becomes not friendly for nanoprobing. The alternative solution to produce good planar surface is to use Plasma Focus Ion Beam (PFIB) technique with patented DX gas assisted. PFIB changes the convention FA workflow and has been proven that the new workflow improves the efficiency of planar failure analysis such as PVC and nanoprobing sample preparation.

FA Approach on MIM (Metal-Insulator-Metal) Capacitor Failures

MIM (Metal-Insulator-Metal) capacitor is a capacitor fabricated between metal layers and usually in an array form. Since it is usually buried within stack of back-end metal layers, neither front side nor backside FA fault isolation techniques can easily pinpoint the defect location of a failing MIM capacitor. A preliminary fault isolation (FI) often needs to be performed by biasing the desired failing state setup to highlight the difference(s) of FI site(s) between failing unit & reference. Then, a detailed study of the CAD (Computer Aided Design) schematic and die layout focusing on the difference(s) of FI site(s) will lead to a more in-depth analyses such as Focused Ion-Beam (FIB) circuit edit, micro-probing/nano-probing, Voltage Contrast (VC) and other available FA techniques to further identify the defective MIM capacitor. Once the defective MIM capacitor was identified, FIB cross-section or delayering can be performed to inspect the physical defect on the MIM capacitor. This paper presents the FA approach and challenges in successfully finding MIM capacitor failures.

Fault Isolation Approaches for Nanoscale TSV Interconnects in 3D Heterogenous Integration

We report optical and electron beam-based fault isolation approaches for short and open defects in nanometer scale through silicon via (TSV) interconnects (180×250 nm, 500 nm height). Short defects are localized by photon emission microscopy (PEM) and optical beam-induced current (OBIC) techniques, and open defects are isolated by active voltage contrast imaging in the scanning electron microscope (SEM). We confirm our results by transmission electron microscopy (TEM) based cross sectioning.

Simple Circuit Edit Passive Voltage Contrast Technique to Identify Leakage Location

Passive voltage contrast (PVC) is widely used to detect underlying connectivity issues between metals based on the brightness of upper metals using scanning electron microscopy (SEM) or focused ion beam (FIB). [1] However, it cannot be applied in all cases due to the uniqueness of each case where brightness alone is insufficient to tell leakage location. In this study, propose a simple technique using platinum (Pt) marking as a circuit edit (CE) technique to alter metal PVC to identify the actual leakage location. Conventional SEM and PVC contrast imaging are unable to pinpoint exact defects without data confirming the leakage from nano-probing such as Atomic Force Probing (AFP) or SEM base nano-probing (NP) [2]. Using this method, we can improve the analysis cycle time by direct analysts the defective location in SEM, while also saving tool cost.