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High-Q RF inductors on standard silicon realized using wafer-level packaging techniques
IEEE MTT-S International Microwave Symposium Digest, 2003
◽
10.1109/mwsym.2003.1212605
◽
2003
◽
Cited By ~ 4
Author(s):
G. Carchon
◽
S. Jenei
◽
L. Carbonell
◽
M. Van Hove
◽
S. Decoutere
◽
...
Keyword(s):
Wafer Level
◽
High Q
◽
Wafer Level Packaging
◽
Rf Inductors
Download Full-text
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Cited By
References
Suspended high Q integrated inductor by wafer level packaging technology
Microsystem Technologies
◽
10.1007/s00542-013-2010-x
◽
2013
◽
Vol 21
(1)
◽
pp. 215-219
◽
Cited By ~ 2
Author(s):
M. Han
◽
S. F. Wang
◽
G. W. Xu
◽
Le Luo
Keyword(s):
Wafer Level
◽
Packaging Technology
◽
High Q
◽
Integrated Inductor
◽
Wafer Level Packaging
Download Full-text
Suspended of high-Q integrated inductors using wafer level packaging technologies
2013 14th International Conference on Electronic Packaging Technology
◽
10.1109/icept.2013.6756551
◽
2013
◽
Author(s):
Mei Han
◽
Le Luo
◽
Shuangfu Wang
◽
Tianxi Wang
Keyword(s):
Wafer Level
◽
High Q
◽
Integrated Inductors
◽
Wafer Level Packaging
Download Full-text
High-Q inductors and transmission lines on 20 Ω.cm Si using wafer-level packaging technology
2003 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, 2003. Digest of Papers.
◽
10.1109/smic.2003.1196682
◽
2003
◽
Author(s):
G. Carchon
◽
Xiao Sun
◽
W. De Raedt
Keyword(s):
Transmission Lines
◽
Wafer Level
◽
Packaging Technology
◽
High Q
◽
Wafer Level Packaging
Download Full-text
High-Q on-chip inductors using thin-film wafer level packaging technology demonstrated on a 90 nm RF-CMOS 5 GHz VCO
2005 European Microwave Conference
◽
10.1109/eumc.2005.1608797
◽
2005
◽
Cited By ~ 5
Author(s):
X. Sun
◽
D. Linten
◽
O. Dupuis
◽
G. Carchon
◽
P. Soussan
◽
...
Keyword(s):
Thin Film
◽
Rf Cmos
◽
Wafer Level
◽
Packaging Technology
◽
High Q
◽
Wafer Level Packaging
◽
On Chip
◽
5 Ghz
Download Full-text
RF characterization of mold compound materials and high-$Q$ integrated passives using fan-out wafer-level packaging technology
2019 IEEE 21st Electronics Packaging Technology Conference (EPTC)
◽
10.1109/eptc47984.2019.9026638
◽
2019
◽
Cited By ~ 1
Author(s):
Xiao Sun
◽
John Slabbekoorn
◽
Dimitrios Velenis
◽
Andy Miller
◽
Geert Van der Plas
◽
...
Keyword(s):
Wafer Level
◽
Packaging Technology
◽
High Q
◽
Wafer Level Packaging
◽
Integrated Passives
◽
Compound Materials
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Analysis of high-Q on-chip inductors realized by wafer-level packaging techniques
53rd Electronic Components and Technology Conference, 2003. Proceedings.
◽
10.1109/ectc.2003.1216496
◽
2004
◽
Cited By ~ 6
Author(s):
X. Sun
◽
G. Carchon
◽
W. De Raedt
◽
E. Beyne
Keyword(s):
Wafer Level
◽
High Q
◽
Wafer Level Packaging
◽
On Chip
Download Full-text
High-$Q$ Above-IC Inductors Using Thin-Film Wafer-Level Packaging Technology Demonstrated on 90-nm RF-CMOS 5-GHz VCO and 24-GHz LNA
IEEE Transactions on Advanced Packaging
◽
10.1109/tadvp.2006.884827
◽
2006
◽
Vol 29
(4)
◽
pp. 810-817
◽
Cited By ~ 23
Author(s):
Xiao Sun
◽
Olivier Dupuis
◽
Dimitri Linten
◽
Geert Carchon
◽
Philippe Soussan
◽
...
Keyword(s):
Thin Film
◽
Rf Cmos
◽
Wafer Level
◽
Packaging Technology
◽
High Q
◽
Wafer Level Packaging
◽
5 Ghz
◽
24 Ghz
Download Full-text
High performance RF inductors integrated in advanced Fan-Out wafer level packaging technology
2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
◽
10.1109/sirf.2012.6160146
◽
2012
◽
Cited By ~ 6
Author(s):
Cedric Durand
◽
Frederic Gianesello
◽
Romain Pilard
◽
Daniel Gloria
◽
Yvon Imbs
◽
...
Keyword(s):
High Performance
◽
Wafer Level
◽
Packaging Technology
◽
Wafer Level Packaging
◽
Rf Inductors
Download Full-text
Design and fabrication of suspended high Q MIM capacitors by wafer level packaging technology
2015 16th International Conference on Electronic Packaging Technology (ICEPT)
◽
10.1109/icept.2015.7236551
◽
2015
◽
Cited By ~ 2
Author(s):
Tao Zheng
◽
Mei Han
◽
Gaowei Xu
◽
Le Luo
◽
Tao Zheng
Keyword(s):
Wafer Level
◽
Packaging Technology
◽
High Q
◽
Wafer Level Packaging
◽
Mim Capacitors
Download Full-text
High-Q Timing and Inertial Measurement Unit Chip (TIMU) with 3D Wafer-Level Packaging
2019 IEEE Custom Integrated Circuits Conference (CICC)
◽
10.1109/cicc.2019.8780183
◽
2019
◽
Cited By ~ 1
Author(s):
Farrokh Ayazi
◽
Haoran Wen
◽
Yaesuk Jeong
◽
Pranav Gupta
◽
Anosh Daruwalla
◽
...
Keyword(s):
Inertial Measurement Unit
◽
Measurement Unit
◽
Wafer Level
◽
Inertial Measurement
◽
High Q
◽
Wafer Level Packaging
Download Full-text
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