A tunable flipflop-based frequency divider up to 113 GHz and a fully differential 77GHz push-push VCO in SiGe BiCMOS technology

Author(s):  
S. Trotta ◽  
H. Li ◽  
V. P. Trivedi ◽  
J. John
Electronics ◽  
2020 ◽  
Vol 9 (4) ◽  
pp. 563
Author(s):  
Francesco Centurelli ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Pasquale Tommasino ◽  
Alessandro Trifiletti

Multi-GHz lowpass filters are key components for many RF applications and are required for the implementation of integrated high-speed analog-to-digital and digital-to-analog converters and optical communication systems. In the last two decades, integrated filters in the Multi-GHz range have been implemented using III-V or SiGe technologies. In all cases in which the size of passive components is a concern, inductorless designs are preferred. Furthermore, due to the recent development of high-speed and high-resolution data converters, highly linear multi-GHz filters are required more and more. Classical open loop topologies are not able to achieve high linearity, and closed loop filters are preferred in all applications where linearity is a key requirement. In this work, we present a fully differential BiCMOS implementation of the classical Sallen Key filter, which is able to operate up to about 10 GHz by exploiting both the bipolar and MOS transistors of a commercial 55-nm BiCMOS technology. The layout of the biquad filter has been implemented, and the results of post-layout simulations are reported. The biquad stage exhibits excellent SFDR (64 dB) and dynamic range (about 50 dB) due to the closed loop operation, and good power efficiency (0.94 pW/Hz/pole) with respect to comparable active inductorless lowpass filters reported in the literature. Moreover, unlike other filters, it exploits the different active devices offered by commercial SiGe BiCMOS technologies. Parametric and Monte Carlo simulations are also included to assess the robustness of the proposed biquad filter against PVT and mismatch variations.


Frequenz ◽  
2017 ◽  
Vol 71 (3-4) ◽  
Author(s):  
Xuan-Quang Du ◽  
Anselm Knobloch ◽  
Markus Grözing ◽  
Matthias Buck ◽  
Manfred Berroth

AbstractThis paper presents the analysis and the design of a fully-differential digital programmable gain amplifier (PGA) in a 0.13 µm BiCMOS technology. The PGA has a gain control range of 31 dB with 1 dB gain step size and consumes 284 mW from a 3.6 V power supply. At a maximum gain of 25 dB, the PGA exhibits a 3-dB bandwidth of 10.1 GHz. The measured gain error for all 32 possible gain settings is between –0.19/+0.46 dB at 1 GHz. Up to 13 GHz the third harmonic distortion


2006 ◽  
Author(s):  
Noorfazila Kamal ◽  
Yingbo Zhu ◽  
Leonard T. Hall ◽  
Said F. Al-Sarawi ◽  
Craig Burnet ◽  
...  

Author(s):  
Arzu Ergintav ◽  
Johannes Borngraber ◽  
Bernd Heinemann ◽  
Holger Rucker ◽  
Frank Herzel ◽  
...  

2007 ◽  
Vol 2007 ◽  
pp. 1-8 ◽  
Author(s):  
Klaus Schmalz ◽  
Eckard Grass ◽  
Frank Herzel ◽  
Maxim Piz

This paper presents a 5 GHz wideband I/Q modulator/demodulator for 650 MHz OFDM signal bandwidth, which is integrated with a 5 GHz phase locked loop for I/Q generation. The quadrature signals are derived from a 10 GHz CMOS VCO followed by a bipolar frequency divider. The phase noise at 1 MHz offset is −112 dBc/Hz for the modulator as well as for the demodulator. The chips were produced in a 0.25 μm SiGe BiCMOS technology. The signal-to-noise ratio (SNR) of transmitted/received OFDM signal and the corresponding I/Q mismatch versus baseband frequency are given. The modulator achieves an SNR of 22–23 dB, and the demodulator realizes an SNR up to 22 dB. The modulator reaches a data rate of 2.16 Gbit/s using 64 QAM OFDM, and the demodulator realizes 1.92 Gbits/s.


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