Via-Free Interconnection in Quasi-Hermetic Wafer-Level Packaging for RF-MEMS Applications and 3D Integration

2007 ◽  
Author(s):  
Alain Phommahaxay ◽  
Gaelle Lissorgues ◽  
Lionel Rousseau ◽  
Vincent Perrais ◽  
Frederic Marty ◽  
...  
Keyword(s):  
Rf Mems ◽  
Wafer Level ◽  
3D Integration ◽  
Wafer Level Packaging

On the Origins, Status, and Future of Flip Chip & Wafer Level Packaging

2010 ◽  
Vol 2010 (1) ◽  
pp. 000325-000332 ◽  
Author(s):  
Alan Huffman ◽  
Philip Garrou
Keyword(s):  
Technological Change ◽  
Flip Chip ◽  
Emerging Technologies ◽  
Unit Area ◽  
Form Factors ◽  
Electrical Performance ◽  
Wafer Level ◽  
3D Integration ◽  
Wafer Level Packaging ◽  
Area Array

As IC scaling continues to shrink transistors, the increased number of circuits per chip requires more I/O per unit area (Rent's rule). High I/O count, the need for smaller form factors and the need for better electrical performance drove the technological change towards die being interconnected (assembled) by area array techniques. This review will examine this evolution from die wire bonded on lead frames to flip chip die in wafer level or area array packages and discuss emerging technologies such as copper pillar bumps, fan out packaging, integrated passives, and 3D integration..

Reliability of Hermetic RF MEMS Wafer Level Packaging Using Au-Sn Eutectic Bonding

2006 ◽  
pp. 609-612
Author(s):  
Qian Wang ◽  
Sung Hoon Choa ◽  
Woon Bae Kim ◽  
Jun Sik Hwang ◽  
Suk Jin Ham ◽  
...  
Keyword(s):  
Rf Mems ◽  
Wafer Level ◽  
Eutectic Bonding ◽  
Wafer Level Packaging

scholarly journals Wafer-level packaging of aluminum nitride RF MEMS filters

2015 ◽  
Author(s):  
M. David Henry ◽  
Travis Young ◽  
Andrew E. Hollowell ◽  
Matt Eichenfield ◽  
Roy H. Olsson
Keyword(s):  
Aluminum Nitride ◽  
Rf Mems ◽  
Wafer Level ◽  
Wafer Level Packaging

Wafer level packaging of MEMS and 3D integration with CMOS for fabrication of timing microsystems

2016 ◽  
Author(s):  
Charles-Alix Manier ◽  
Kai Zoschke ◽  
Martin Wilke ◽  
Hermann Oppermann ◽  
David Ruffieux ◽  
...  
Keyword(s):  
Wafer Level ◽  
3D Integration ◽  
Wafer Level Packaging

scholarly journals Hermetic wafer-level packaging for RF MEMs: Effects on resonator performance

2012 ◽  
Author(s):  
M. David Henry ◽  
K. Douglas Greth ◽  
Janet Nguyen ◽  
Christopher D. Nordquist ◽  
Randy Shul ◽  
...  
Keyword(s):  
Rf Mems ◽  
Wafer Level ◽  
Wafer Level Packaging
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