Digital control of buck converter using arduino microcontroller for low power applications

2017 ◽  
Author(s):  
V Viswanatha ◽  
R Venkata Siva Reddy
Keyword(s):  
Low Power ◽  
Digital Control ◽  
Buck Converter ◽  
Arduino Microcontroller

Digital control of multiphase Series Capacitor Buck converter prototype for the powering of HL-LHC Inner Triplet magnets

2021 ◽  
pp. 1-1
Author(s):  
Edorta Ibarra ◽  
Antoni Arias ◽  
Inigo Martinez de Alegria ◽  
A. Otero-Olavarrieta ◽  
Louis De Mallac
Keyword(s):  
Digital Control ◽  
Buck Converter ◽  
Series Capacitor

Application of Digital Control Techniques for Satellite Medium Power DC-DC Converters

2011 ◽  
Vol 57 (1) ◽  
pp. 77-83 ◽  
Author(s):  
Konrad Skup ◽  
Paweł Grudziński ◽  
Piotr Orleański
Keyword(s):  
Digital Control ◽  
High Speed ◽  
Control Process ◽  
Digital Signal ◽  
Current Mode ◽  
Power Converter ◽  
Buck Converter ◽  
Research Centre ◽  
Analog To Digital ◽  
Control Techniques

Application of Digital Control Techniques for Satellite Medium Power DC-DC Converters The objective of this paper is to present a work concerning a digital control loop system for satellite medium power DC-DC converters that is done in Space Research Centre. The whole control process of a described power converter is based on a high speed digital signal processing. The paper presents a development of a FPGA digital controller for voltage and current mode stabilization that was implemented using VHDL. The described controllers are based on a classical digital PID controller. The converter used for testing is a 200 kHz, 750W buck converter with 50V/15A output. A high resolution digital PWM approach is presented. Additionally a simple and effective solution of filtering of an analog-to-digital converter output is presented.

A Low-Power High-Data-Rate ASK IF Receiver With a Digital-Control AGC Loop

2010 ◽  
Vol 57 (8) ◽  
pp. 617-621 ◽  
Author(s):  
Xiaoman Wang ◽  
Baoyong Chi ◽  
Zhihua Wang
Keyword(s):  
Low Power ◽  
Digital Control ◽  
Data Rate ◽  
High Data Rate ◽  
High Data

scholarly journals Buck Converter for Low-Power PV Modules: A Comparative Study

Proceedings ◽  
2018 ◽  
Vol 2 (13) ◽  
pp. 1050
Author(s):  
Ferran Reverter ◽  
Manel Gasulla
Keyword(s):  
Low Power ◽  
Buck Converter ◽  
Operating Voltage ◽  
Storage Unit ◽  
Maximum Power Point ◽  
Pv Module ◽  
Optimal Value ◽  
Pv Modules ◽  
Energy Transducer ◽  
Power Point

Autonomous sensors that harvest energy from the environment usually employ a dc/dc converter to regulate the operating voltage of the energy transducer around its maximum power point (MPP). In this context, this work evaluates the efficiency of a buck converter when regulating the operating point of two low-power photovoltaic (PV) modules subjected to different irradiance levels. The buck converter operates in burst mode (BM) and is able to transfer the energy from the PV module to a storage unit through an optimal value of the inductor current. Experimental results show that an irradiance increase can cause either an increase or a decrease of the converter efficiency. This is because the higher the irradiance, the higher both the MPP voltage and current of the PV module, which involve opposite effects in terms of the converter efficiency.

Robust digital control of a DC–DC buck converter with low frequency samplings

2012 ◽  
Vol 17 (1) ◽  
pp. 1-6
Author(s):  
Yuji Fukaishi ◽  
Yoshihiro Ohta ◽  
Kohji Higuchi ◽  
Eiji Takegami ◽  
Satoshi Tomioka ◽  
...  
Keyword(s):  
Digital Control ◽  
Low Frequency ◽  
Buck Converter

Low Power Design of a 1 V 8-bit 125 fJ Asynchronous SAR ADC with Binary Weighted Capacitive DAC

2017 ◽  
Vol 26 (05) ◽  
pp. 1750077 ◽  
Author(s):  
Anush Bekal ◽  
Shabi Tabassum ◽  
Manish Goswami
Keyword(s):  
Low Power ◽  
Successive Approximation ◽  
Digital Control ◽  
Low Power Design ◽  
Cmos Technology ◽  
Control Logic ◽  
Control Block ◽  
Logic Block ◽  
External Clock ◽  
Asynchronous Sar

The work proposes an improved technique to design a low power 8-bit asynchronous successive approximation register (ASAR), an analog-to-digital converter (ADC). The proposed ASAR ADC consists of a comparator, ASAR (digital control logic block), and a capacitive-digital-to-analog convertor (C-DAC). The comparator is a preamplier-based improved positive feedback latch circuit which has a built-in sample and hold (S/H) functionality and saves an enormous amount of power. The implemented digital control logic block performing the successive approximation (SA) algorithm is totally unrestrained of the external clock pulse. The outputs from the comparator are given to a XOR logic whose outputs serve as an internally generated clock (ready signal) to trigger the digital control block. Hence, an external clock is not required to initiate the digital control block making its operation asynchronous. By implementing this, the ADC can circumvent the usage of an oversampled clock and can operate on a single low-speed sample clock. This, in turn, saves power and it cuts down the required resilience in sampling rates. The proposed ADC has been designed and simulated using UMC-0.18[Formula: see text][Formula: see text]m CMOS technology which dissipates 32.18[Formula: see text][Formula: see text]W power when operated on a single 1[Formula: see text]V power supply and achieves complete 8-bit conversion in 1.09[Formula: see text][Formula: see text]s. The relative accuracy of capacitor ratio, aperture jitter and FOM are 0.39[Formula: see text], 1.2[Formula: see text]ns and 125[Formula: see text]fJ/conversion-step, respectively.

scholarly journals A Fully Integrated Bluetooth Low-Energy Transceiver with Integrated Single Pole Double Throw and Power Management Unit for IoT Sensors

Sensors ◽  
2019 ◽  
Vol 19 (10) ◽  
pp. 2420 ◽  
Author(s):  
Sung Jin Kim ◽  
Dong Gyu Kim ◽  
Seong Jin Oh ◽  
Dong Soo Lee ◽  
Young Gun Pu ◽  
...  
Keyword(s):  
Low Power ◽  
Power Management ◽  
Low Noise ◽  
Buck Converter ◽  
Low Energy ◽  
Management Unit ◽  
Load Current ◽  
Bluetooth Low Energy ◽  
Current Consumption ◽  
Power Management Unit

This paper presents a low power Gaussian Frequency-Shift Keying (GFSK) transceiver (TRX) with high efficiency power management unit and integrated Single-Pole Double-Throw switch for Bluetooth low energy application. Receiver (RX) is implemented with the RF front-end with an inductor-less low-noise transconductance amplifier and 25% duty-cycle current-driven passive mixers, and low-IF baseband analog with a complex Band Pass Filter(BPF). A transmitter (TX) employs an analog phase-locked loop (PLL) with one-point GFSK modulation and class-D digital Power Amplifier (PA) to reduce current consumption. In the analog PLL, low power Voltage Controlled Oscillator (VCO) is designed and the automatic bandwidth calibration is proposed to optimize bandwidth, settling time, and phase noise by adjusting the charge pump current, VCO gain, and resistor and capacitor values of the loop filter. The Analog Digital Converter (ADC) adopts straightforward architecture to reduce current consumption. The DC-DC buck converter operates by automatically selecting an optimum mode among triple modes, Pulse Width Modulation (PWM), Pulse Frequency Modulation (PFM), and retention, depending on load current. The TRX is implemented using 1P6M 55-nm Complementary Metal–Oxide–Semiconductor (CMOS) technology and the die area is 1.79 mm2. TRX consumes 5 mW on RX and 6 mW on the TX when PA is 0-dBm. Measured sensitivity of RX is −95 dBm at 2.44 GHz. Efficiency of the DC-DC buck converter is over 89% when the load current is higher than 2.5 mA in the PWM mode. Quiescent current consumption is 400 nA from a supply voltage of 3 V in the retention mode.

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