Robust digital control of a DC–DC buck converter with low frequency samplings

2012 ◽  
Vol 17 (1) ◽  
pp. 1-6
Author(s):  
Yuji Fukaishi ◽  
Yoshihiro Ohta ◽  
Kohji Higuchi ◽  
Eiji Takegami ◽  
Satoshi Tomioka ◽  
...  
Keyword(s):  
Digital Control ◽  
Low Frequency ◽  
Buck Converter

Digital control of multiphase Series Capacitor Buck converter prototype for the powering of HL-LHC Inner Triplet magnets

2021 ◽  
pp. 1-1
Author(s):  
Edorta Ibarra ◽  
Antoni Arias ◽  
Inigo Martinez de Alegria ◽  
A. Otero-Olavarrieta ◽  
Louis De Mallac
Keyword(s):  
Digital Control ◽  
Buck Converter ◽  
Series Capacitor

Application of Digital Control Techniques for Satellite Medium Power DC-DC Converters

2011 ◽  
Vol 57 (1) ◽  
pp. 77-83 ◽  
Author(s):  
Konrad Skup ◽  
Paweł Grudziński ◽  
Piotr Orleański
Keyword(s):  
Digital Control ◽  
High Speed ◽  
Control Process ◽  
Digital Signal ◽  
Current Mode ◽  
Power Converter ◽  
Buck Converter ◽  
Research Centre ◽  
Analog To Digital ◽  
Control Techniques

Application of Digital Control Techniques for Satellite Medium Power DC-DC Converters The objective of this paper is to present a work concerning a digital control loop system for satellite medium power DC-DC converters that is done in Space Research Centre. The whole control process of a described power converter is based on a high speed digital signal processing. The paper presents a development of a FPGA digital controller for voltage and current mode stabilization that was implemented using VHDL. The described controllers are based on a classical digital PID controller. The converter used for testing is a 200 kHz, 750W buck converter with 50V/15A output. A high resolution digital PWM approach is presented. Additionally a simple and effective solution of filtering of an analog-to-digital converter output is presented.

Pulse Phase Shift Based Low-Frequency Oscillation Suppression for PT Controlled CCM Buck Converter

2018 ◽  
Vol 65 (10) ◽  
pp. 1465-1469 ◽  
Author(s):  
Dongsheng Yu ◽  
Yisen Geng ◽  
Herbert H. C. Iu ◽  
Tyrone Fernando ◽  
Ruidong Xu
Keyword(s):  
Phase Shift ◽  
Low Frequency ◽  
Buck Converter ◽  
Frequency Oscillation ◽  
Low Frequency Oscillation ◽  
Pulse Phase ◽  
Oscillation Suppression

A 65-nm, 1-A Buck Converter With Multi-Function SAR-ADC-Based CCM/PSK Digital Control Loop

2012 ◽  
Vol 47 (7) ◽  
pp. 1546-1556 ◽  
Author(s):  
Sébastien Cliquennois ◽  
Achille Donida ◽  
Piero Malcovati ◽  
Andrea Baschirotto ◽  
Angelo Nagari
Keyword(s):  
Digital Control ◽  
Buck Converter ◽  
Sar Adc ◽  
Control Loop

scholarly journals Challenges and implementation aspects of switched-mode power supplies with digital control for automotive applications

2016 ◽  
Vol 14 ◽  
pp. 85-90 ◽  
Author(s):  
Samuel Quenzer-Hohmuth ◽  
Thoralf Rosahl ◽  
Steffen Ritzmann ◽  
Bernhard Wicht
Keyword(s):  
Digital Control ◽  
Buck Converter ◽  
Power Supplies ◽  
Analog To Digital Converter ◽  
Digital Converter ◽  
Control Loop ◽  
Analog To Digital ◽  
Analog Control ◽  
Parameter Variations ◽  
Switched Mode Power Supplies

Abstract. Switched-mode power supplies (SMPS) convert an input DC-voltage into a higher or lower output voltage. In automotive, analog control is mostly used in order to keep the required output voltages constant and resistant to disturbances. The design of robust analog control for SMPS faces parameter variations of integrated and external passive components. Using digital control, parameter variations can be eliminated and the required area for the integrated circuit can be reduced at the same time. Digital control design bears challenges like the prevention of limit cycle oscillations and controller-wind-up. This paper reviews how to prevent these effects. Digital control loops introduce new sources for dead times in the control loop, for example the latency of the analog-to-digital-converter (ADC). Dead times have negative influence on the stability of the control loop, because they lead to phase delays. Consequently, low latency is one of the key requirements for analog-to-digital-converters in digitally controlled SMPS. Exploiting the example of a 500 kHz-buck converter with a crossover frequency of 70 kHz, this paper shows that the 5 µs-latency of a ΔΣ-analog-to-digital-converter leads to a reduction in phase margin of 126°. The latency is less critical for boost converters because of their inherent lower crossover frequencies. Finally, the paper shows a comparison between analog and digital control of SMPS with regard to chip area and test costs.

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