Comments on "Depletion approximation analysis of the differential capacitance-voltage characteristics of an MOS structure with nonuniformly doped semiconductors"

1980 ◽  
Vol 27 (9) ◽  
pp. 1848-1849 ◽  
Author(s):  
R.R. O'Brien
Author(s):  
Stuart Friedman ◽  
Oskar Amster ◽  
Yongliang Yang ◽  
Fred Stanke

Abstract The use of Atomic Force Microscopy (AFM) electrical measurement modes is a critical tool for the study of semiconductor devices and process development. A relatively new electrical mode, scanning microwave impedance microscopy (sMIM), measures a material’s change in permittivity and conductivity at the scale of an AFM probe tip [1]. sMIM provides the real and imaginary impedance (Re(Z) and Im(Z)) of the probe-sample interface. By measuring the reflected microwave signal as a sample of interest is imaged with an AFM, we can in parallel capture the variations in permittivity and conductivity and, for doped semiconductors, variations in the depletion-layer geometry. An existing technique for characterizing doped semiconductors, scanning capacitance microscopy, modulates the tip-sample bias and detects the tip-sample capacitance with a lock-in amplifier. A previous study compares sMIM to SCM and highlights the additional capabilities of sMIM [2], including examples of nano-scale capacitance-voltage curves. In this paper we focus on the detailed mechanisms and capabilities of the nano-scale C-V curves and the ability to extract semiconductor properties from them. This study includes analytical and finite element modeling of tip bias dependent depletion-layer geometry and impedance. These are compared to experimental results on reference samples for both doped Si and GaN doped staircases to validate the systematic response of the sMIM-C (capacitive) channel to the doping concentration.


2016 ◽  
Vol 39 ◽  
pp. 134-150
Author(s):  
Valerii Ievtukh ◽  
A. Nazarov

In this work, nanocrystal nonvolatile memory devices comprising of silicon nanocrystals located in gate oxide of MOS structure, were comprehensively studied on specialized modular data acquisition setup developed for capacitance-voltage measurements. The memory window formation, memory window retention and charge relaxation experimental methods were used to study the trapping/emission processes inside the dielectric layer of MOS capacitor memory. The trapping/emission processes were studied in standard bipolar memory mode and in new unipolar memory mode, which is specific for nanocrystalline nonvolatile memory. The analysis of experimental results shown that unipolar programming mode is more favourable for nanocrystalline memory operation due to lower wearing out and higher breakdown immunity of the MOS device’s oxide. The study was performed for two types of nanocrystalline memory devices: with one and two silicon nanocrystalline 2D layers in oxide of MOS structure correspondingly. The electrostatic modelling was presented to explain the experimental results.


2014 ◽  
Vol 3 (2) ◽  
pp. 3-9
Author(s):  
S. D. Lin ◽  
C. P. Lee ◽  
V. V. Ilchenko ◽  
V. V. Marin ◽  
M. V. Shkil ◽  
...  

2008 ◽  
Vol 42 (11) ◽  
pp. 1351-1354 ◽  
Author(s):  
E. A. Bobrova ◽  
N. M. Omeljanovskaya

1993 ◽  
Vol 32 (Part 1, No. 9A) ◽  
pp. 4005-4011 ◽  
Author(s):  
Takamasa Sakai ◽  
Motohiro Kohno ◽  
Sadao Hirae ◽  
Ikuyoshi Nakatani ◽  
Tatsufumi Kusuda

2000 ◽  
Vol 61 (8) ◽  
pp. 5499-5504 ◽  
Author(s):  
A. J. Chiquito ◽  
Yu. A. Pusep ◽  
S. Mergulhão ◽  
J. C. Galzerani ◽  
N. T. Moshegov

2020 ◽  
Vol 8 (6) ◽  
pp. 1962-1971 ◽  
Author(s):  
Tiqiang Pang ◽  
Kai Sun ◽  
Yucheng Wang ◽  
Suzhen Luan ◽  
Yuming Zhang ◽  
...  

Characterizing ion migration using capacitance–voltage characteristics and proposing a carrier transport model for a perovskite MOS structure.


1999 ◽  
Vol 5 (S2) ◽  
pp. 978-979
Author(s):  
Atul. A. Konkar ◽  
Wei Chen ◽  
Kari Noehring

Scanning capacitance microscopy (SCM) is currently one of the most promising tools for twodimensional carrier profiling. This technique, based upon atomic force microscope (AFM) operated in the contact mode, uses a conductive probe which is scanned over the semiconductor surface. The conductive probe, oxide on the surface of the semiconductor, and the semiconductor substrate form a metal-oxide-semiconductor (MOS) structure. An a.c. bias is applied to the tip and the capacitance of the MOS structure is monitored. The a.c. bias changes the depletion of carriers in the semiconductor and thus the total capacitance of the structure. The maximum capacitance of the MOS structure is obtained when the semiconductor is in accumulation and the total capacitance of the structure is the capacitance of the semiconductor surface oxide. The minimum capacitance is obtained when the semiconductor region under the tip is in inversion. Since SCM the output signal is proportional to the differential capacitance, to get a high signal we need to maximize the difference between the maximum and minimum in the total MOS capacitance.


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