oxide charge
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2022 ◽  
Vol 236 ◽  
pp. 111511
Author(s):  
Yuxiang Wang ◽  
Yue Liu ◽  
Junye Tong ◽  
Xinan Shi ◽  
Lijian Huang ◽  
...  

2022 ◽  
Vol 13 (1) ◽  
Author(s):  
Moohyun Kim ◽  
Byoung-Hwa Kwon ◽  
Chul Woong Joo ◽  
Myeong Seon Cho ◽  
Hanhwi Jang ◽  
...  

AbstractMetal oxides are intensively used for multilayered optoelectronic devices such as organic light-emitting diodes (OLEDs). Many approaches have been explored to improve device performance by engineering electrical properties. However, conventional methods cannot enable both energy level manipulation and conductivity enhancement for achieving optimum energy band configurations. Here, we introduce a metal oxide charge transfer complex (NiO:MoO3-complex), which is composed of few-nm-size MoO3 domains embedded in NiO matrices, as a highly tunable carrier injection material. Charge transfer at the finely dispersed interfaces of NiO and MoO3 throughout the entire film enables effective energy level modulation over a wide work function range of 4.47 – 6.34 eV along with enhanced electrical conductivity. The high performance of NiO:MoO3-complex is confirmed by achieving 189% improved current efficiency compared to that of MoO3-based green OLEDs and also an external quantum efficiency of 17% when applied to blue OLEDs, which is superior to 1,4,5,8,9,11-hexaazatriphenylene-hexacarbonitrile-based conventional devices.


Author(s):  
Mriganka Singh ◽  
Yu-Jung Lu ◽  
Gang Li ◽  
Hong-Cheu Lin ◽  
Chih Wei Chu
Keyword(s):  

2021 ◽  
Vol 8 ◽  
Author(s):  
Mriganka Singh ◽  
Chih Wei Chu ◽  
Annie Ng

Nowadays, the power conversion efficiency of organometallic mixed halide perovskite solar cells (PSCs) is beyond 25%. To fabricate highly efficient and stable PSCs, the performance of metal oxide charge transport layers (CTLs) is one of the key factors. The CTLs are employed in PSCs to separate the electrons and holes generated in the perovskite active layer, suppressing the charge recombination rate so that the charge collection efficiency can be increased at their respective electrodes. In general, engineering of metal oxide electron transport layers (ETLs) is found to be dominated in the research community to boost the performance of PSCs due to the resilient features of ETLs such as excellent electronic properties, high resistance to thermal temperature and moisture, ensuring good device stability as well as their high versatility in material preparation. The metal oxide hole transport layers in PSCs are recently intensively studied. The performance of PSCs is found to be very promising by using optimized hole transport materials. This review concisely discusses the evolution of some prevalent metal oxide charge transport materials (CTMs) including TiO2, SnO2, and NiOx, which are able to yield high-performance PSCs. The article begins with introducing the development trend of PSCs using different types of CTLs, pointing out the important criteria for metal oxides being effective CTLs, and then a variety of preparation methods for CTLs as employed by the community for high-performance PSCs are discussed. Finally, the challenges and prospects for future research direction toward scalable metal oxide CTM-based PSCs are delineated.


2021 ◽  
Vol 221 ◽  
pp. 110870
Author(s):  
Mriganka Singh ◽  
Rei-Ting Yang ◽  
Da-Wei Weng ◽  
Hanlin Hu ◽  
Anupriya Singh ◽  
...  

2020 ◽  
Vol 91 (1) ◽  
pp. 10101
Author(s):  
Kiyoteru Kobayashi ◽  
Hiroshi Mino

We have evaluated the hole trapping capability of the silicon carbonitride (SiCN) dielectric film for application in metal-oxide-nitride-oxide-silicon (MONOS)-type non-volatile memory devices. After a great number of holes were injected to the SiCN charge trap layer of memory capacitors at high applied voltages, the flat-band voltage shift ΔV fb,h of the capacitors was saturated and the charge centroid location of holes trapped in the SiCN layer was found to reach at 1.8–2.0 nm from the blocking oxide-charge trap layer interface. Using the obtained ΔV fb,h and charge centroid values, the maximum density of holes trapped in the SiCN layer was estimated to be 1.2 × 1013 holes/cm2, which was higher than that trapped in a silicon nitride charge trap layer (=1.0 × 1013 holes/cm2). It is concluded that the high density of trapped holes caused large ΔV fb,h in the memory capacitors with the SiCN layer.


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