scholarly journals Signal and Thermal Integrity Analysis of 3-D Stacked Resistive Random Access Memories

2021 ◽  
Vol 68 (1) ◽  
pp. 88-94
Author(s):  
Zayer Fakhreddine ◽  
Khitem Lahbacha ◽  
Alexander Melnikov ◽  
Hamdi Belgacem ◽  
Massimiliano de Magistris ◽  
...  
Author(s):  
F. Zayer ◽  
K. Lahbacha ◽  
W. Dghais ◽  
H. Belgacem ◽  
Massimiliano de Magistris ◽  
...  

2016 ◽  
Author(s):  
Matteo Berioli ◽  
Giuseppe Cocco ◽  
Gianluigi Liva ◽  
Andrea Munari

2018 ◽  
Author(s):  
Tuba Kiyan ◽  
Heiko Lohrke ◽  
Christian Boit

Abstract This paper compares the three major semi-invasive optical approaches, Photon Emission (PE), Thermal Laser Stimulation (TLS) and Electro-Optical Frequency Mapping (EOFM) for contactless static random access memory (SRAM) content read-out on a commercial microcontroller. Advantages and disadvantages of these techniques are evaluated by applying those techniques on a 1 KB SRAM in an MSP430 microcontroller. It is demonstrated that successful read out depends strongly on the core voltage parameters for each technique. For PE, better SNR and shorter integration time are to be achieved by using the highest nominal core voltage. In TLS measurements, the core voltage needs to be externally applied via a current amplifier with a bias voltage slightly above nominal. EOFM can use nominal core voltages again; however, a modulation needs to be applied. The amplitude of the modulated supply voltage signal has a strong effect on the quality of the signal. Semi-invasive read out of the memory content is necessary in order to remotely understand the organization of memory, which finds applications in hardware and software security evaluation, reverse engineering, defect localization, failure analysis, chip testing and debugging.


Author(s):  
Srikanth Perungulam ◽  
Scott Wills ◽  
Greg Mekras

Abstract This paper illustrates a yield enhancement effort on a Digital Signal Processor (DSP) where random columns in the Static Random Access Memory (SRAM) were found to be failing. In this SRAM circuit, sense amps are designed with a two-stage separation and latch sequence. In the failing devices the bit line and bit_bar line were not separated far enough in voltage before latching got triggered. The design team determined that the sense amp was being turned on too quickly. The final conclusion was that a marginal sense amp design, combined with process deviations, would result in this type of failure. The possible process issues were narrowed to variations of via resistances on the bit and bit_bar lines. Scanning Electron Microscope (SEM) inspection of the the Focused Ion Beam (FIB) cross sections followed by Transmission Electron Microscopy (TEM) showed the presence of contaminants at the bottom of the vias causing resistance variations.


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