Yield Enhancement Study: Process Variation and Design Margins Leading to Timing Issues in the RAM

Author(s):  
Srikanth Perungulam ◽  
Scott Wills ◽  
Greg Mekras

Abstract This paper illustrates a yield enhancement effort on a Digital Signal Processor (DSP) where random columns in the Static Random Access Memory (SRAM) were found to be failing. In this SRAM circuit, sense amps are designed with a two-stage separation and latch sequence. In the failing devices the bit line and bit_bar line were not separated far enough in voltage before latching got triggered. The design team determined that the sense amp was being turned on too quickly. The final conclusion was that a marginal sense amp design, combined with process deviations, would result in this type of failure. The possible process issues were narrowed to variations of via resistances on the bit and bit_bar lines. Scanning Electron Microscope (SEM) inspection of the the Focused Ion Beam (FIB) cross sections followed by Transmission Electron Microscopy (TEM) showed the presence of contaminants at the bottom of the vias causing resistance variations.

1998 ◽  
Vol 4 (S2) ◽  
pp. 652-653 ◽  
Author(s):  
A. N. Campbell ◽  
J. M. Soden

A great deal can be learned about integrated circuits (ICs) and microelectronic structures simply by imaging them in a focused ion beam (FIB) system. FIB systems have evolved during the past decade from something of a curiosity to absolutely essential tools for microelectronics design verification and failure analysis. FIB system capabilities include localized material removal, localized deposition of conductors and insulators, and imaging. A major commercial driver for FIB systems is their usefulness in the design debugging cycle by (1) rewiring ICs quickly to test design changes and (2) making connection to deep conductors to facilitate electrical probing of complex ICs. FIB milling is also used for making precision cross sections and for TEM sample preparation of microelectronic structures for failure analysis and yield enhancement applications.


2001 ◽  
Vol 7 (S2) ◽  
pp. 514-515 ◽  
Author(s):  
Larry Rice

Electron beam induced current (EBIC) is the common term used in the semiconductor industry for the failure analysis and yield enhancement of semiconductor devices using SEM to electrically pinpoint leakage sites. EBIC is a useful technique for locating defects in diodes, transistors, and capacitors where the scanning electron microscope beam is used to generate a signal and the sample is the detector. Often during yield enhancement efforts the failure analyst is asked to determine the mechanism for which a PC structure (which may contain as many as a few hundred thousand structures in one device) is failing tests. Blind cross sections rarely give evidence of the failure mechanism. EBIC can be used to pinpoint the bad site which is then precision cross-sectioned using the focused ion beam (FIB).When an electron beam impinges on a semiconductor such as silicon, electron-hole pairs are created when the incident beam transfers enough energy to promote an electron from the valance band to the conduction band.


2002 ◽  
Vol 719 ◽  
Author(s):  
Myoung-Woon Moon ◽  
Kyang-Ryel Lee ◽  
Jin-Won Chung ◽  
Kyu Hwan Oh

AbstractThe role of imperfections on the initiation and propagation of interface delaminations in compressed thin films has been analyzed using experiments with diamond-like carbon (DLC) films deposited onto glass substrates. The surface topologies and interface separations have been characterized by using the Atomic Force Microscope (AFM) and the Focused Ion Beam (FIB) imaging system. The lengths and amplitudes of numerous imperfections have been measured by AFM and the interface separations characterized on cross sections made with the FIB. Chemical analysis of several sites, performed using Auger Electron Spectroscopy (AES), has revealed the origin of the imperfections. The incidence of buckles has been correlated with the imperfection length.


Author(s):  
Becky Holdford

Abstract On mechanically polished cross-sections, getting a surface adequate for high-resolution imaging is sometimes beyond the analyst’s ability, due to material smearing, chipping, polishing media chemical attack, etc.. A method has been developed to enable the focused ion beam (FIB) to re-face the section block and achieve a surface that can be imaged at high resolution in the scanning electron microscope (SEM).


Author(s):  
Steven B. Herschbein ◽  
Hyoung H. Kang ◽  
Scott L. Jansen ◽  
Andrew S. Dalton

Abstract Test engineers and failure analyst familiar with random access memory arrays have probably encountered the frustration of dealing with address descrambling. The resulting nonsequential internal bit cell counting scheme often means that the location of the failing cell under investigation is nowhere near where it is expected to be. A logical to physical algorithm for decoding the standard library block might have been provided with the design, but is it still correct now that the array has been halved and inverted to fit the available space in a new processor chip? Off-line labs have traditionally been tasked with array layout verification. In the past, hard and soft failures could be induced on the frontside of finished product, then bitmapped to see if the sites were in agreement. As density tightened, flip-chip FIB techniques to induce a pattern of hard fails on packaged devices came into practice. While the backside FIB edit method is effective, it is complex and expensive. The installation of an in-line Dual Beam FIB created new opportunities to move FA tasks out of the lab and into the FAB. Using a new edit procedure, selected wafers have an extensive pattern of defects 'written' directly into the memory array at an early process level. Bitmapping of the RAM blocks upon wafer completion is then used to verify correlation between the physical damaged cells and the logical sites called out in the test results. This early feedback in-line methodology has worked so well that it has almost entirely displaced the complex laboratory procedure of backside FIB memory array descramble verification.


Author(s):  
Qi Chen ◽  
W. D. Griffiths

AbstractIn this work, Mo was added into Al melt to reduce the detrimental effect of double-oxide film defect. An air bubble was trapped in a liquid metal (2L99), served as an analogy for double-oxide film defect in aluminum alloy castings. It was found that the addition of Mo significantly accelerated the consumption of the entrapped bubble by 60 pct after holding for 1 hour. 2 sets of testbar molds were then cast, with 2L99 and 2L99+Mo alloy, with a badly designed running system, intended to deliberately introduce double oxide film defects into the liquid metal. Tensile testing showed that, with the addition of Mo, the Weibull modulus of the Ultimate Tensile Strength and pct Elongation was increased by a factor of 2.5 (from 9 to 23) and 2 (from 2.5 to 4.5), respectively. The fracture surface of 2L99+Mo alloy testbars revealed areas of nitrides contained within bi-film defects. Cross-sections through those defects by Focused Ion Beam milling suggested that the surface layer were permeable, which could be as thick as 30 μm, compared to around 500 nm for the typical oxide film thickness. Transmission Electron Microscopy analysis suggested that the nitride-containing layer consisted of nitride particles as well as spinel phase of various form. The hypothesis was raised that the permeability of the nitride layers promote the reaction between the entrapped atmosphere in the defect and the surrounding liquid metal, reducing the defect size and decreasing their impact on mechanical properties.


Ceramics ◽  
2019 ◽  
Vol 2 (4) ◽  
pp. 568-577 ◽  
Author(s):  
Frigan ◽  
Chevalier ◽  
Zhang ◽  
Spies

The market share of zirconia (ZrO2) dental implants is steadily increasing. This material comprises a polymorphous character with three temperature-dependent crystalline structures, namely monoclinic (m), tetragonal (t) and cubic (c) phases. Special attention is given to the tetragonal phase when maintained in a metastable state at room temperature. Metastable tetragonal grains allow for the beneficial phenomenon of Phase Transformation Toughening (PTT), resulting in a high fracture resistance, but may lead to an undesired surface transformation to the monoclinic phase in a humid environment (low-temperature degradation, LTD, often referred to as ‘ageing’). Today, the clinical safety of zirconia dental implants by means of long-term stability is being addressed by two international ISO standards. These standards impose different experimental setups concerning the dynamic fatigue resistance of the final product (ISO 14801) or the ageing behavior of a standardized sample (ISO 13356) separately. However, when evaluating zirconia dental implants pre-clinically, oral environmental conditions should be simulated to the extent possible by combining a hydrothermal treatment and dynamic fatigue. For failure analysis, phase transformation might be quantified by non-destructive techniques, such as X-Ray Diffraction (XRD) or Raman spectroscopy, whereas Scanning Electron Microscopy (SEM) of cross-sections or Focused Ion Beam (FIB) sections might be used for visualization of the monoclinic layer growth in depth. Finally, a minimum load should be defined for static loading to fracture. The purpose of this communication is to contribute to the current discussion on how to optimize the aforementioned standards in order to guarantee clinical safety for the patients.


2000 ◽  
Vol 8 (2) ◽  
pp. 36-39
Author(s):  
Clive Chandler

Control of layer thickness is critically important in the manufacture of semiconductor devices. Cross-sectioning exposes device structures for direct examination but conventional sample preparation procedures are difficult, time consuming, and grossly destructive. Cross sections created by focused ion beam (FIB) milling are easier, faster, and less destructive but have not offered the clear layer delineation provided by etching in the conventional sample preparation process. A new gas etch capability (Delineation Etch™ from FEI Company) offers results that are equivalent to conventional wet-etch preparations in a fraction of the time from a single, automated system in the fab without destroying the wafer. The new etch process also has application in milling high-aspect-ratio holes to create contacts to buried metal layers, and in deprocessing devices to reveal silicon and polysilicon structures.


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