Ultra-Low-Power Cryogenic SiGe Low-Noise Amplifiers: Theory and Demonstration

Monitoring the electrical activities of a large number of neurons in vertebrates' central nervous system in vivo through hundreds of parallel channels without interferring in their natural functions is a neuroscientist's interest. Value of this information in both scientific and clinical contexts, especially in expansion of brain–computer interfaces, is extremely significant. Therefore, low-noise amplifiers are needed with filtering capability on the front end to amplify the desired signals and eliminate direct current baseline shifts. Hence, size and power consumption need to be minimized to reduce trauma and heat dissipation, which can result in tissue damage for human applications and the system needs to be implantable and wireless. The practical solution for developing such systems is system-on-a-chip, based on ultra-low-power mixed-mode and wideband RFIC designs. They, however, impose a number of challenges that may require nontraditional solutions. In this paper, we present a fully differential low-power low-noise preamplifier suitable for recording biological signals, from a few mHz up to 10 kHz. This amplifier has a bandpass filter that is tunable between 10 mHz and 10 kHz, and has been designed and simulated in a standard 90-nm CMOS process. The circuit consumes 10 μW from a 1.2 V supply and provides a gain of 40 dB and an output swing of ±0.5 V with a total harmonic distortion of less than 0.5%. The total input-referred noise level is 4.6 μV integrating the noise over 0.01 Hz to 10 kHz.

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InAs/AlSb HEMT and Its Application to Ultra-Low-Power Wideband High-Gain Low-Noise Amplifiers

IEEE Transactions on Microwave Theory and Techniques ◽

10.1109/tmtt.2006.883604 ◽

2006 ◽

Vol 54 (12) ◽

pp. 4448-4455 ◽

Cited By ~ 53

Author(s):

Bob Yintat Ma ◽

Joshua Bergman ◽

Peter Chen ◽

Jonathan B. Hacker ◽

Gerard Sullivan ◽

...

Keyword(s):

Low Power ◽

High Gain ◽

Low Noise ◽

Low Noise Amplifiers ◽

Ultra Low Power

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A 219-µW ultra-low power low-noise amplifier for IEEE 802.15.4 based battery powered, portable, wearable IoT applications

SN Applied Sciences ◽

10.1007/s42452-021-04402-0 ◽

2021 ◽

Vol 3 (4) ◽

Author(s):

S. Chrisben Gladson ◽

Adith Hari Narayana ◽

V. Thenmozhi ◽

M. Bhaskar

Keyword(s):

Low Power ◽

Ieee 802.15.4 ◽

Low Voltage ◽

Low Noise ◽

Low Noise Amplifier ◽

Cmos Process ◽

Process Technology ◽

Ultra Low Power ◽

Power Mode ◽

Noise Amplifier

AbstractDue to the increased processing data rates, which is required in applications such as fifth-generation (5G) wireless networks, the battery power will discharge rapidly. Hence, there is a need for the design of novel circuit topologies to cater the demand of ultra-low voltage and low power operation. In this paper, a low-noise amplifier (LNA) operating at ultra-low voltage is proposed to address the demands of battery-powered communication devices. The LNA dual shunt peaking and has two modes of operation. In low-power mode (Mode-I), the LNA achieves a high gain ($$S21$$ S 21 ) of 18.87 dB, minimum noise figure ($${NF}_{min.}$$ NF m i n . ) of 2.5 dB in the − 3 dB frequency range of 2.3–2.9 GHz, and third-order intercept point (IIP3) of − 7.9dBm when operating at 0.6 V supply. In high-power mode (Mode-II), the achieved gain, NF, and IIP3 are 21.36 dB, 2.3 dB, and 13.78dBm respectively when operating at 1 V supply. The proposed LNA is implemented in UMC 180 nm CMOS process technology with a core area of $$0.40{\mathrm{ mm}}^{2}$$ 0.40 mm 2 and the post-layout validation is performed using Cadence SpectreRF circuit simulator.

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An Ultra-Low Power 900 MHz Intermediate Frequency Low Noise Amplifier For Low-Power RF Receivers

10.1109/socc49529.2020.9524753 ◽

2020 ◽

Author(s):

Aasish Boora ◽

Bharatha Kumar Thangarasu ◽

Kiat Seng Yeo

Keyword(s):

Low Power ◽

Intermediate Frequency ◽

Low Noise ◽

Low Noise Amplifier ◽

Ultra Low Power ◽

Rf Receivers ◽

Noise Amplifier

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Ultra-Low Power CMOS Readout for Resonant MEMS Strain Sensors

Proceedings ◽

10.3390/proceedings2130973 ◽

2018 ◽

Vol 2 (13) ◽

pp. 973

Author(s):

Marco Crescentini ◽

Cinzia Tamburini ◽

Luca Belsito ◽

Aldo Romani ◽

Alberto Roncaglia ◽

...

Keyword(s):

Low Power ◽

Power Supply ◽

First Generation ◽

Negative Resistance ◽

Low Noise ◽

Strain Sensors ◽

Current Conveyors ◽

Ultra Low Power ◽

Active Elements ◽

Low Power Cmos

This paper presents an ultra-low power, silicon-integrated readout for resonant MEMS strain sensors. The analogue readout implements a negative-resistance amplifier based on first-generation current conveyors (CCI) that, thanks to the reduced number of active elements, targets both low-power and low-noise. A prototype of the circuit was implemented in a 0.18-µm technology occupying less than 0.4 mm2 and consuming only 9 µA from the 1.8-V power supply. The prototype was earliest tested by connecting it to a resonant MEMS strain resonator.

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