C$^\text{2}$TIG: Dynamic C$^\text{2}$MOS Design Based on Three-Independent-Gate Field-Effect Transistors

A TCAD Simulation Study of Three-Independent-Gate Field-Effect Transistors at the 10-nm Node

IEEE Transactions on Electron Devices ◽

10.1109/ted.2021.3089671 ◽

2021 ◽

pp. 1-7

Author(s):

Patsy Cadareanu ◽

Pierre-Emmanuel Gaillardon

Keyword(s):

Simulation Study ◽

Field Effect ◽

Tcad Simulation ◽

A Comprehensive Evaluation of Integrated Circuits Side-Channel Resilience Utilizing Three-Independent-Gate Silicon NanoWire Field Effect Transistors based Current Mode Logic

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2021.3128364 ◽

2021 ◽

pp. 1-1

Author(s):

Yanjiang Liu ◽

Jiaji He ◽

Haocheng Ma ◽

Tongzhou Qu ◽

Zibin Dai

Keyword(s):

Integrated Circuits ◽

Field Effect ◽

Comprehensive Evaluation ◽

Silicon Nanowire ◽

Current Mode ◽

Side Channel ◽

Current Mode Logic ◽

IFIP Advances in Information and Communication Technology - VLSI-SoC: New Technology Enabler ◽

A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors

10.1007/978-3-030-53273-4_14 ◽

2020 ◽

pp. 307-322

Author(s):

Patsy Cadareanu ◽

Ganesh Gore ◽

Edouard Giacomin ◽

Pierre-Emmanuel Gaillardon

Keyword(s):

Process Design ◽

Field Effect ◽

Predictive Process ◽

BCB Evaluation of High-Performance and Low-Leakage Three-Independent-Gate Field-Effect Transistors

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits ◽

10.1109/jxcdc.2018.2821638 ◽

2018 ◽

Vol 4 (1) ◽

pp. 35-43 ◽

Cited By ~ 5

Author(s):

Jorge Romero-Gonzalez ◽

Pierre-Emmanuel Gaillardon

Keyword(s):

Field Effect ◽

High Performance ◽

Low Leakage ◽

Parasitic Capacitance Analysis of Three-Independent-Gate Field-Effect Transistors

IEEE Journal of the Electron Devices Society ◽

10.1109/jeds.2021.3070475 ◽

2021 ◽

pp. 1-1

Author(s):

Patsy Cadareanu ◽

Jorge Romero-Gonzalez ◽

Pierre-Emmanuel Gaillardon

Keyword(s):

Field Effect ◽

Parasitic Capacitance ◽

BCB benchmarking for three-independent-gate field effect transistors

Functionality-Enhanced Devices An alternative to Moore's Law ◽

10.1049/pbcs039e_ch10 ◽

2018 ◽

pp. 221-253

Keyword(s):

Field Effect ◽

Multiple Independent Gate Field Effect Transistors Device, Process, Applications

ECS Meeting Abstracts ◽

10.1149/ma2005-01/12/563 ◽

2005 ◽

Keyword(s):

Field Effect ◽

An Efficient Adder Architecture with Three- Independent-Gate Field-Effect Transistors

2018 IEEE International Conference on Rebooting Computing (ICRC) ◽

10.1109/icrc.2018.8638608 ◽

2018 ◽

Cited By ~ 3

Author(s):

Jorge Romero-Gonzalez ◽

Pierre- Emmanuel Gaillardon

Keyword(s):

Field Effect ◽

2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC) ◽

A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors

10.1109/vlsi-soc.2019.8920358 ◽

2019 ◽

Author(s):

Ganesh Gore ◽

Patsy Cadareanu ◽

Edouard Giacomin ◽

Pierre-Emmanuel Gaillardon

Keyword(s):

Process Design ◽

Field Effect ◽

Predictive Process ◽

A novel SCA-resilience flip-flop design utilizing the current mode logic based on the three-independent-gate field effect transistors

IEICE Electronics Express ◽

10.1587/elex.18.20210248 ◽

2021 ◽

Author(s):

Yuehui Li ◽

Yanjiang Liu ◽

Xianzhao Xia ◽

Yiqiang Zhao

Keyword(s):

Field Effect ◽

Current Mode ◽

Flip Flop ◽

Current Mode Logic ◽