independent gate Recently Published Documents

Tcad Simulation ◽

A Comprehensive Evaluation of Integrated Circuits Side-Channel Resilience Utilizing Three-Independent-Gate Silicon NanoWire Field Effect Transistors based Current Mode Logic

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2021.3128364 ◽

2021 ◽

pp. 1-1

Author(s):

Yanjiang Liu ◽

Jiaji He ◽

Haocheng Ma ◽

Tongzhou Qu ◽

Zibin Dai

Keyword(s):

Integrated Circuits ◽

Field Effect ◽

Comprehensive Evaluation ◽

Silicon Nanowire ◽

Current Mode ◽

Side Channel ◽

Current Mode Logic ◽

Performance and Circuit Analysis of Independent Gate FinFET

Computers and Devices for Communication - Lecture Notes in Networks and Systems ◽

10.1007/978-981-15-8366-7_63 ◽

2021 ◽

pp. 427-433

Author(s):

Ankush Chattopadhyay ◽

Chayanika Bose ◽

K. Sarkar Chandan

Keyword(s):

Circuit Analysis ◽

Parasitic Capacitance Analysis of Three-Independent-Gate Field-Effect Transistors

IEEE Journal of the Electron Devices Society ◽

10.1109/jeds.2021.3070475 ◽

2021 ◽

pp. 1-1

Author(s):

Patsy Cadareanu ◽

Jorge Romero-Gonzalez ◽

Pierre-Emmanuel Gaillardon

Keyword(s):

Field Effect ◽

Parasitic Capacitance ◽

A novel SCA-resilience flip-flop design utilizing the current mode logic based on the three-independent-gate field effect transistors

IEICE Electronics Express ◽

10.1587/elex.18.20210248 ◽

2021 ◽

Author(s):

Yuehui Li ◽

Yanjiang Liu ◽

Xianzhao Xia ◽

Yiqiang Zhao

Keyword(s):

Field Effect ◽

Current Mode ◽

Flip Flop ◽

Current Mode Logic ◽

Temperature Independent Gate Oxide Degradation Monitoring of SiC MOSFETs Based on Junction Capacitances

IEEE Transactions on Power Electronics ◽

10.1109/tpel.2021.3049394 ◽

2021 ◽

pp. 1-1

Author(s):

Masoud Farhadi ◽

Fei Yang ◽

Shi Pu ◽

Bhanu Vankayaplati ◽

Bilal Akin

Keyword(s):

Gate Oxide ◽

Oxide Degradation ◽

Degradation Monitoring ◽

2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT) ◽

A Novel HSPICE Model for Dual-Threshold Independent-Gate TFET

10.1109/icsict49897.2020.9278014 ◽

2020 ◽

Author(s):

Zihao Zhang ◽

Jianping Hu

Keyword(s):

Compact Modeling of Graded N-Channel Independent Gate FET with Underlaps, Spacer and S/D Straggle for Low Power Application

Silicon ◽

10.1007/s12633-020-00424-2 ◽

2020 ◽

Author(s):

Ankush Chattopadhyay ◽

Chayanika Bose ◽

Chandan K. Sarkar

Keyword(s):

Low Power ◽

Compact Modeling ◽

Power Application ◽

IFIP Advances in Information and Communication Technology - VLSI-SoC: New Technology Enabler ◽

A Predictive Process Design Kit for Three-Independent-Gate Field-Effect Transistors

10.1007/978-3-030-53273-4_14 ◽

2020 ◽

pp. 307-322

Author(s):

Patsy Cadareanu ◽

Ganesh Gore ◽

Edouard Giacomin ◽

Pierre-Emmanuel Gaillardon

Keyword(s):

Process Design ◽

Field Effect ◽

Predictive Process ◽

C$^\text{2}$TIG: Dynamic C$^\text{2}$MOS Design Based on Three-Independent-Gate Field-Effect Transistors

IEEE Transactions on Nanotechnology ◽

10.1109/tnano.2020.2965119 ◽

2020 ◽

Vol 19 ◽

pp. 123-136 ◽

Cited By ~ 2

Author(s):

Daniel Vana ◽

Pierre-Emmanuel Gaillardon ◽

Adam Teman

Keyword(s):

Field Effect ◽