A CMOS Variable Gain Amplifier with DC Offset Calibration Loop for Wireless Communications

Author(s):  
Zhih-siou Cheng ◽  
Jenn-chyou Bor
IEEE Access ◽  
2018 ◽  
Vol 6 ◽  
pp. 54139-54146 ◽  
Author(s):  
Zhiqing Liu ◽  
Yunqiu Wu ◽  
Chenxi Zhao ◽  
Johannes Benedikt ◽  
Kai Kang

IEEE Access ◽  
2018 ◽  
Vol 6 ◽  
pp. 61826-61832 ◽  
Author(s):  
Long He ◽  
Lianming Li ◽  
Xu Wu ◽  
Zhigong Wang

2019 ◽  
Vol 66 (10) ◽  
pp. 1693-1697
Author(s):  
Alessandro Finocchiaro ◽  
Giuseppe Papotto ◽  
Egidio Ragonese ◽  
Giuseppe Palmisano

2012 ◽  
Vol 33 (8) ◽  
pp. 085003 ◽  
Author(s):  
Chang Liu ◽  
Yuepeng Yan ◽  
Goh Wang-Ling ◽  
Yongzhong Xiong ◽  
Lijun Zhang ◽  
...  

2009 ◽  
Vol 129 (10) ◽  
pp. 1968-1969
Author(s):  
Tetsuro Okura ◽  
Shunsuke Okura ◽  
Toru Ido ◽  
Kenji Taniguchi

Author(s):  
Jorge Pérez Bailón ◽  
Jaime Ramírez-Angulo ◽  
Belén Calvo ◽  
Nicolás Medrano

This paper presents a Variable Gain Amplifier (VGA) designed in a 0.18 μm CMOS process to operate in an impedance sensing interface. Based on a transconductance-transimpedance (TC-TI) approach with intermediate analog-controlled current steering, it exhibits a gain ranging from 5 dB to 38 dB with a constant bandwidth around 318 kHz, a power consumption of 15.5 μW at a 1.8 V supply and an active area of 0.021 mm2.


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