Substrate preparation and low-temperature boron doped silicon growth on wafer-scale charge-coupled devices by molecular beam epitaxy

Author(s):  
S. D. Calawa ◽  
B. E. Burke ◽  
P. M. Nitishin ◽  
A. H. Loomis ◽  
J. A. Gregory ◽  
...  
1988 ◽  
Vol 64 (1) ◽  
pp. 246-248 ◽  
Author(s):  
J. Castagne ◽  
E. Bedel ◽  
C. Fontaine ◽  
A. Munoz‐Yague

2010 ◽  
Vol 97 (19) ◽  
pp. 192501 ◽  
Author(s):  
Y. Maeda ◽  
K. Hamaya ◽  
S. Yamada ◽  
Y. Ando ◽  
K. Yamane ◽  
...  

2003 ◽  
Vol 6 (5-6) ◽  
pp. 425-427 ◽  
Author(s):  
K. Ogawa ◽  
H. Ofuchi ◽  
H. Maki ◽  
T. Sonoyama ◽  
D. Inoue ◽  
...  

1991 ◽  
Vol 241 ◽  
Author(s):  
Bijan Tadayon ◽  
Mohammad Fatemi ◽  
Saied Tadayon ◽  
F. Moore ◽  
Harry Dietrich

ABSTRACTWe present here the results of a study on the effect of substrate temperature, Ts, on the electrical and physical characteristics of low temperature (LT) molecular beam epitaxy GaAs layers. Hall measurements have been performed on the asgrown samples and on samples annealed at 610 °C and 850 °C. Si implantation into these layers has also been investigated.


1991 ◽  
Vol 69 (11) ◽  
pp. 7942-7944 ◽  
Author(s):  
K. T. Shiralagi ◽  
R. A. Puechner ◽  
K. Y. Choi ◽  
R. Droopad ◽  
G. N. Maracas

1987 ◽  
Vol 94 ◽  
Author(s):  
S. B. Ogale ◽  
M. Thomsen ◽  
A. Madhukar

ABSTRACTComputer simulations of III-V molecular beam epitaxy (MBE) show that surface reconstruction induced modulation of kinetic rates could give rise to ordering in alloys. Results are also presented for the possible influence of an external ion beam in achieving low temperature epitaxy as well as smoother growth front under usual conditions.


2013 ◽  
Vol 102 (10) ◽  
pp. 102104 ◽  
Author(s):  
K. M. Yu ◽  
W. L. Sarney ◽  
S. V. Novikov ◽  
D. Detert ◽  
R. Zhao ◽  
...  

2002 ◽  
Vol 36 (8) ◽  
pp. 837-840 ◽  
Author(s):  
V. V. Preobrazhenskii ◽  
M. A. Putyato ◽  
B. R. Semyagin

Sign in / Sign up

Export Citation Format

Share Document