Low-noise quantum frequency down-conversion of indistinguishable photons (Conference Presentation)

2016 ◽  
Author(s):  
Benjamin Kambs ◽  
Jan Kettler ◽  
Matthias Bock ◽  
Jonas N. Becker ◽  
Carsten Arend ◽  
...  
2016 ◽  
Vol 24 (19) ◽  
pp. 22250 ◽  
Author(s):  
Benjamin Kambs ◽  
Jan Kettler ◽  
Matthias Bock ◽  
Jonas Nils Becker ◽  
Carsten Arend ◽  
...  

2014 ◽  
Vol 22 (20) ◽  
pp. 24192 ◽  
Author(s):  
Dehuan Kong ◽  
Zongyang Li ◽  
Shaofeng Wang ◽  
Xuyang Wang ◽  
Yongmin Li

Author(s):  
Wei Cai ◽  
Frank Shi

<p class="lead">The objective of this research was to design a basic 2.4 GHz heterodyne receiver for healthcare on a 130um CMOS process. The ultimate goal for the wireless industry is to minimize the trade-offs between performance and cost, and between performance and low power consumption design. In the first part, a low noise amplifier (LNA), which is commonly used as the first stage of a receiver, is introduced and simulated. LNA performance greatly affects the overall receiver performance. The LNA was designed at the 2.4 GHz ISM band, using the cascode with an inductive degeneration topology. The second part of this thesis presents a low power 2.4 GHz down conversion Gilbert Cell mixer. In the third part, a high-performance LC-tank CMOS VCO was designed at 2.4 GHz. The design uses using PMOS cross-coupled topology with the varactor for wider tuning range topology. In the first part, a low noise amplifier (LNA) design reaches the NF of 2 dB, has a power consumption of 2.2 mW, and has a gain of 20dB. The second part of this proposal presents a low power 2.4 GHz down conversion Gilbert Cell mixer. The obtained result shows a conversion gain of 14.6 dB and power consumption of 8.2 mW at a 1.3V supply voltage. In the third part, a high-performance LC-tank CMOS VCO was designed at 2.4 GHz. The final simulation of the phase noise is-128 dBc/Hz, and the tuning range is 2.3 GHz-2.5 GHz while the total power consumption is 3.25 mW.<strong> </strong>The performance of the receiver meets the specification requirements of the desired standard.</p>


Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 593
Author(s):  
Hyunki Jung ◽  
Dzuhri Radityo Utomo ◽  
Saebyeok Shin ◽  
Seok-Kyun Han ◽  
Sang-Gug Lee ◽  
...  

A broadband receiver front-end with low noise figure and flat conversion gain response is presented in this paper. The receiver front-end is a part of the broadband spectrum sensing receiver and processes 30–40 GHz of broad input spectrum followed by down-conversion to DC-10 GHz of IF signal. The proposed work is comprised of a low noise amplifier (LNA), on-chip passive Balun, down conversion mixer, and output buffer. To achieve front-end target specification over 10 GHz input bandwidth, the stagger-tuned LNA is employed and the down conversion mixer is loaded with a 3rd-order LC ladder low pass filter. The prototype chip was implemented in 45 nm CMOS technology. The chip achieves 10.3–16.5 dB conversion gain, 5.9 dB integrated NF, and −11 dBm IIP3 from 30 to 40 GHz. The chip is realized within 0.42 mm 2 and consumes 96 mW from a 1.2 V supply.


Author(s):  
Alessandro Farsi ◽  
Stephane Clemmen ◽  
Sven Ramelow ◽  
Alexander L. Gaeta

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