A Low Power Low-Pass Fourth-Order Filter for WiMAX/LTE Receiver in CMOS 45nm Technology

2016 ◽  
Vol 26 (03) ◽  
pp. 1750048 ◽  
Author(s):  
Vida Orduee Niar ◽  
Gholamreza Zare Fatin

In this paper, a [Formula: see text]-[Formula: see text] low-pass and low power filter with tunable in-band attenuation for WiMAX/LTE receiver is presented. The fourth-order filter consists of two cascaded biquad stages. The source-follower (SF) stage is used as a key building block in these biquads. In this paper, we have presented a circuit technique to reduce the nonlinearity of the SF stage resulting from unmatched signal swings at the gate and source terminals of the input transistor. The proposed SF stage, is used for design of a linear biquad which is then utilized in a fourth-order Butterworth low-pass filter. The simulation results of the filter for bandwidth of 10 MHz show that the IIP3 of the filter is equal to 8.22[Formula: see text]dBm, in-band noise density is 100[Formula: see text]nV/[Formula: see text]Hz and power consumption is 5.9[Formula: see text]mW. The supply voltage of the filter is equal to 1[Formula: see text]V.

2021 ◽  
Author(s):  
Hima Bindu Katikala ◽  
G.Ramana Murthy ◽  
Yatavakilla Amarendra Nath

Abstract The important challenge for the realization of hearing aids is small size, low cost, low power consumption and better performance, etc. Keeping these requirements in view this work concentrates on the VLSI (Very Large Scale Integrated) implementation of analog circuit that mimic the PPSK (Passive Phase Shift Keying) demodulator with low pass filter. This research deals with RF Cochlear implant circuits and their data transmission. A PPSK modulator is used for uplink data transmission in biomedical implants with simultaneous power, data transmission This paper deals about the implementation of PPSK demodulator with related circuits and low pass filter which are used in cochlear implants consumes low power and operates at 14MHz frequency. These circuits are designed using FINFET 20nm technology with 0.4v DC supply voltage. The performance of proposed design over the previous design is operating at low threshold voltage, reduces static leakage currents and often observed greater than 30 times of improvement in speed performance


Author(s):  
MOHAMMAD HADI DANESH ◽  
SASAN NIKSERESHT ◽  
MAHYAR DEHDAST

In this paper a low-power current-mode RMS-to-DC converter is proposed. The proposed converter includes absolute value circuit, squarer/divider circuit, low-pass filter and square root circuit which employ CMOS transistors operating in weak inversion region. The RMS-to-DC converter has low power consumption (<1μW), low supply voltage (0.9V), wide input range (from 50 nA to 500 nA), low relative error (<3 %), and low circuit complexity. Comparing the proposed circuit with two other current-mode circuits shows that the former outperforms the latters in terms of power dissipation, supply voltage, and complexity. Simulation results by HSPICE show high performance of the circuit and confirm the validity of the proposed design technique.


Author(s):  
MOHAMMAD HADI DANESH ◽  
MAHYAR DEHDAST ◽  
ABDOLGHANI AREKHI ◽  
AMIN EMAMI FARD

In this paper a low-power current-mode RMS-to-DC converter is proposed. The converter includes two-quadrant squarer/divider and the first-order low-pass filter cell, both of them use MOS translinear loops. The RMS-to-DC converter has low power consumption (< 0.75μW), low supply voltage (0.8 V), wide input range (from 40 nA to 500 nA), low relative error (< 3 %), and low circuit complexity. Comparing the proposed circuit with two other current-mode circuits shows that the former outperforms the latters in terms of power dissipation, supply voltage, and complexity. Simulation results by HSPICE show high performance of the circuit and confirm the validity of the proposed design technique.


2014 ◽  
Vol 556-562 ◽  
pp. 3585-3589
Author(s):  
Meng Qiong Wang ◽  
Chun Yu Xu

In view of the shortages time lag existing in traditional digital low-pass filter in Active Power Filter (Active Power Filter, APF), this paper proposes to adopt slipped-window integrator to realize low-pass filter in harmonic current detection.The current tracking control uses Space Vector Pulse Width Modulation method. Meanwhile, the repetitive predictor is applied so as to improve the real-time performance of the compensation current tracking control. Built a three-phase shunt active power filter simulation model in Matlab/Simulink environment and take experiment under the low pressure condition. The results show that slipped-window integrator and deadbeat current mothod can acquire good dynamic response performance as well as high precision.


2011 ◽  
Vol 32 (9) ◽  
pp. 095002 ◽  
Author(s):  
Zheng Gong ◽  
Bei Chen ◽  
Xueqing Hu ◽  
Yin Shi ◽  
Fa Foster Dai

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