Temperature Dependence of Phase-Change Random Access Memory Cell

2006 ◽  
Vol 45 (5A) ◽  
pp. 3955-3958 ◽  
Author(s):  
X. S. Miao ◽  
L. P. Shi ◽  
H. K. Lee ◽  
J. M. Li ◽  
R. Zhao ◽  
...  
Keyword(s):  
Phase Change ◽  
Temperature Dependence ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Access Memory

Temperature Dependence of Phase Change Random Access Memory Cell

2005 ◽  
Author(s):  
X. S. Miao ◽  
L. P. Shi ◽  
R. Zhao ◽  
P. K. Tan ◽  
K.G. Lim ◽  
...  
Keyword(s):  
Phase Change ◽  
Temperature Dependence ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Access Memory

Simulation Study on Heat Conduction of a Nanoscale Phase-Change Random Access Memory Cell

2006 ◽  
Vol 6 (11) ◽  
pp. 3474-3478
Author(s):  
JunHo Kim ◽  
Ki-Bong Song
Keyword(s):  
Phase Change ◽  
Electric Conductivity ◽  
Fem Simulation ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Heat Transfer Characteristics ◽  
Temperature Dependent ◽  
Access Memory ◽  
Physical Quantities

We have investigated heat transfer characteristics of a nano-scale phase-change random access memory (PRAM) cell using finite element method (FEM) simulation. Our PRAM cell is based on ternary chalcogenide alloy, Ge2Sb2Te5 (GST), which is used as a recording layer. For contact area of 100 × 100 nm2, simulations of crystallization and amorphization processes were carried out. Physical quantities such as electric conductivity, thermal conductivity, and specific heat were treated as temperature-dependent parameters. Through many simulations, it is concluded that one can reduce set current by decreasing both electric conductivities of amorphous GST and crystalline GST, and in addition to these conditions by decreasing electric conductivity of molten GST one can also reduce reset current significantly.

3-D Finite Element Simulation of a Phase-change Random Access Memory Cell with a Self-insulated Structure

2008 ◽  
Vol 1108 ◽  
Author(s):  
Ke Sun ◽  
Wen Feng ◽  
Jae Young Lee ◽  
Biyun Li ◽  
Ya-Hong Xie
Keyword(s):  
Finite Element ◽  
Phase Change ◽  
Finite Element Simulation ◽  
Thermal Efficiency ◽  
Proximity Effect ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Access Memory ◽  
Element Simulation

AbstractIn this paper, we proposed a phase-change random access memory (PCRAM) cell with a self-insulated structure (SIS), which is expected to have better thermal efficiency than the conventional structures. 3-D finite element simulation is used to study the most power consuming RESET process for both SIS and conventional normal bottom contact (NBC) cells driven by a MOSFET. Instead of programming current, power consumption is investigated to give a more fundamental comparison between the two structures. Thermal proximity effect for both kinds of cells is directly analyzed by simulating a 3×3 device array. The potential slow-quenching issue of SIS is also discussed.

Phase change random access memory cell with superlattice-like structure

2006 ◽  
Vol 88 (12) ◽  
pp. 122114 ◽  
Author(s):  
T. C. Chong ◽  
L. P. Shi ◽  
R. Zhao ◽  
P. K. Tan ◽  
J. M. Li ◽  
...  
Keyword(s):  
Phase Change ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Access Memory

Lateral phase change random access memory cell design for low power operation

2006 ◽  
Vol 13 (2) ◽  
pp. 169-172 ◽  
Author(s):  
F. Merget ◽  
D. H. Kim ◽  
P. Haring Bolivar ◽  
H. Kurz
Keyword(s):  
Low Power ◽  
Phase Change ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Cell Design ◽  
Access Memory ◽  
Power Operation

scholarly journals Pre-Emphasis Pulse Design for Random-Access Memory

Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1454
Author(s):  
Yoshihiro Sugiura ◽  
Toru Tanzawa
Keyword(s):  
Time Constant ◽  
Random Access ◽  
Memory Cell ◽  
Random Access Memory ◽  
Memory Access ◽  
Access Time ◽  
Access Memory ◽  
Delay Times ◽  
Cell Current ◽  
The Impact

This paper describes how one can reduce the memory access time with pre-emphasis (PE) pulses even in non-volatile random-access memory. Optimum PE pulse widths and resultant minimum word-line (WL) delay times are investigated as a function of column address. The impact of the process variation in the time constant of WL, the cell current, and the resistance of deciding path on optimum PE pulses are discussed. Optimum PE pulse widths and resultant minimum WL delay times are modeled with fitting curves as a function of column address of the accessed memory cell, which provides designers with the ability to set the optimum timing for WL and BL (bit-line) operations, reducing average memory access time.

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